From owner-freebsd-mips@FreeBSD.ORG Mon Nov 5 16:49:24 2012 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 5A6728BE for ; Mon, 5 Nov 2012 16:49:24 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-ia0-f182.google.com (mail-ia0-f182.google.com [209.85.210.182]) by mx1.freebsd.org (Postfix) with ESMTP id 0C2C98FC08 for ; Mon, 5 Nov 2012 16:49:23 +0000 (UTC) Received: by mail-ia0-f182.google.com with SMTP id k10so5784329iag.13 for ; Mon, 05 Nov 2012 08:49:23 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:subject:mime-version:content-type:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer :x-gm-message-state; bh=8+Yx+H3gAL2xC7M4dpzvHFEtShmdtbHb8Hug/h04xm4=; b=iHjJgOX3vpiYZRUiDa68yhg83BfPVlCcEqXQEaYCQIG80bMTf0jo4uEz9oRJMAorgC Kn4LYdQfj1S1jji7ieAZcpNR5EgBzYNKHN6vEPI+4iigI3G/CVGuDRz6zn1mVxDObMC5 ctsXdVnHc0tY5v/gptjMj712Hmr1QYep2bFVcQ16Z7BuGbmVuYFpVSx6zAKBeb4qipzs 3OQPpLj4CysPBEuXiycGaO4CzY+z0Eikpef2HpXKVVSXNtwEAX9GmAzN+jeGw42XZmWu LR7682zGzyTNfV9ElDuTOse1hevvQJVJRbCBqKQdSt5GijucPhFiiyFDuSIFREhaB/Ut bAqg== Received: by 10.50.46.134 with SMTP id v6mr10052228igm.55.1352134163103; Mon, 05 Nov 2012 08:49:23 -0800 (PST) Received: from 53.imp.bsdimp.com (50-78-194-198-static.hfc.comcastbusiness.net. [50.78.194.198]) by mx.google.com with ESMTPS id 10sm6054081ign.5.2012.11.05.08.49.20 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 05 Nov 2012 08:49:22 -0800 (PST) Sender: Warner Losh Subject: Re: CACHE_LINE_SIZE macro. Mime-Version: 1.0 (Apple Message framework v1084) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: Date: Mon, 5 Nov 2012 09:49:19 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: References: <201211041828.qA4ISomC076058@pdx.rh.CN85.ChatUSA.com> To: Eitan Adler X-Mailer: Apple Mail (2.1084) X-Gm-Message-State: ALoCoQke8h+arp7oPKQGN7evor4s+d/ylB1aNriIdFWevaa7olhsDESA7fprBr2C683gheQ+PUzJ Cc: "Rodney W. Grimes" , Juli Mallett , "freebsd-mips@FreeBSD.org" X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Nov 2012 16:49:24 -0000 On Nov 5, 2012, at 9:23 AM, Eitan Adler wrote: > On 4 November 2012 13:28, Rodney W. Grimes > wrote: >>=20 >> What ABI is exposing anything about cache parameters or may be come = dependent >> on such information? >=20 > There has been some discussion recently about padding lock mutexs to > the cache line size in order to avoid false sharing of CPUs. Some have > claimed to see significant performance increases as a result. Is that an out-of-kernel interface? If we did that, we'd have to make it run-time settable, because there's = no one right answer for arm and MIPS cpus: they are all different. Warner