From owner-freebsd-mips@FreeBSD.ORG Mon Jan 5 20:32:36 2015 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id A8BE7E92; Mon, 5 Jan 2015 20:32:36 +0000 (UTC) Received: from mail-wi0-x234.google.com (mail-wi0-x234.google.com [IPv6:2a00:1450:400c:c05::234]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id B5DA33AC6; Mon, 5 Jan 2015 20:31:48 +0000 (UTC) Received: by mail-wi0-f180.google.com with SMTP id n3so4089954wiv.7; Mon, 05 Jan 2015 12:31:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:sender:in-reply-to:references:date:message-id:subject :from:to:cc:content-type:content-transfer-encoding; bh=KyK1vkKU7MuSmgDqp6/rpgpcgR1K1fkbIQ+fq0z3Vzs=; b=fkRIOaal/ve2TwNkrjzgEJYW0ASmHw5PyF5aVLCMUfHctfBYpkO8kzDGMmhOD/L7Qn LRhmK5d59wipTPrDMIQhsUqVgnJCiy6czmvxSHcKMZ6clqYvaA9Sqsw2jBOBUZuAc4xp hwS97zoRmyqgB5cxq9eHKix4jtaOUCHRxvf1ujQZtrZuXnfbCApylQJ90SGwXWQFzD1B bcVqsizCu2ciZmR7KWua4D6cBls9SClEjdOhrAAh3RM0Xzo6yxx/FXdILov9GKJGcp7F LT4eab3mGR4lzuEJJVc4yFiqj+VIjcF0O25yiHE5uSUImtQ6eda6qmMmZbmQV8ezFfDm f4rQ== MIME-Version: 1.0 X-Received: by 10.194.108.9 with SMTP id hg9mr180109268wjb.68.1420489907169; Mon, 05 Jan 2015 12:31:47 -0800 (PST) Sender: adrian.chadd@gmail.com Received: by 10.216.41.136 with HTTP; Mon, 5 Jan 2015 12:31:47 -0800 (PST) In-Reply-To: <5F7CBB50-6C91-49C9-BF69-301496DDE792@bsdimp.com> References: <5F7CBB50-6C91-49C9-BF69-301496DDE792@bsdimp.com> Date: Mon, 5 Jan 2015 12:31:47 -0800 X-Google-Sender-Auth: qM3Tskxy6ZnNDHb1k6GAIHn1ADI Message-ID: Subject: Re: interrupt muxes, bus memory space and other fun amusing things From: Adrian Chadd To: Warner Losh Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Cc: Warner Losh , Ian Lepore , John Baldwin , "freebsd-mips@freebsd.org" X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Jan 2015 20:32:36 -0000 On 5 January 2015 at 08:41, Warner Losh wrote: > >> So if I were Linux, I'd just implement a mux that pretends to trigger >> interrupts in a much bigger IRQ space. Ie, they map IP0..IP7 to >> irq0..7, then they pick another IRQ range for the AHB interrupts, and >> another IRQ range for the IP2/IP3 interrupt mux. They have a >> hard-coded mux that takes care of triggering the software IRQ based on >> the hardware interrupt and mux register contents. >> >> So, how should I approach this? > > Same way. You=E2=80=99d create an interrupt device that registers an inte= rrupt > for the mux, then farms it out based on the contents of the registers. > The MIPS interrupt handler might need some work (arm did) to > allow this to happen, but it isn=E2=80=99t super difficult (though IIRc i= t is tedious). Ok. So I can do that, but then devices hang off of which bus? nexus0? Or this mux? Can I create a mux bus to hang things off of that just pass all the memory region requests up to the parent bus (nexus in this case) ? -adrian