From owner-svn-src-head@FreeBSD.ORG Fri Jun 27 20:41:13 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 9E83ECA7; Fri, 27 Jun 2014 20:41:13 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 719D12ABF; Fri, 27 Jun 2014 20:41:13 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s5RKfDtd095098; Fri, 27 Jun 2014 20:41:13 GMT (envelope-from dim@svn.freebsd.org) Received: (from dim@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s5RKfDgg095096; Fri, 27 Jun 2014 20:41:13 GMT (envelope-from dim@svn.freebsd.org) Message-Id: <201406272041.s5RKfDgg095096@svn.freebsd.org> From: Dimitry Andric Date: Fri, 27 Jun 2014 20:41:13 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r267981 - head/contrib/llvm/lib/Target/PowerPC X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 27 Jun 2014 20:41:13 -0000 Author: dim Date: Fri Jun 27 20:41:12 2014 New Revision: 267981 URL: http://svnweb.freebsd.org/changeset/base/267981 Log: Pull in r211627 from upstream llvm trunk (by Bill Schmidt): [PPC64] Fix PR20071 (fctiduz generated for targets lacking that instruction) PR20071 identifies a problem in PowerPC's fast-isel implementation for floating-point conversion to integer. The fctiduz instruction was added in Power ISA 2.06 (i.e., Power7 and later). However, this instruction is being generated regardless of which 64-bit PowerPC target is selected. The intent is for fast-isel to punt to DAG selection when this instruction is not available. This patch implements that change. For testing purposes, the existing fast-isel-conversion.ll test adds a RUN line for -mcpu=970 and tests for the expected code generation. Additionally, the existing test fast-isel-conversion-p5.ll was found to be incorrectly expecting the unavailable instruction to be generated. I've removed these test variants since we have adequate coverage in fast-isel-conversion.ll. This is needed to compile clang with debug+asserts on older powerpc64 and ppc970 targets. Requested by: jhibbits MFC after: 3 days Modified: head/contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp Modified: head/contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp ============================================================================== --- head/contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp Fri Jun 27 20:39:45 2014 (r267980) +++ head/contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp Fri Jun 27 20:41:12 2014 (r267981) @@ -1026,6 +1026,10 @@ bool PPCFastISel::SelectFPToI(const Inst if (DstVT != MVT::i32 && DstVT != MVT::i64) return false; + // If we don't have FCTIDUZ and we need it, punt to SelectionDAG. + if (DstVT == MVT::i64 && !IsSigned && !PPCSubTarget->hasFPCVT()) + return false; + Value *Src = I->getOperand(0); Type *SrcTy = Src->getType(); if (!isTypeLegal(SrcTy, SrcVT))