From owner-freebsd-questions Fri Apr 20 10:41:17 2001 Delivered-To: freebsd-questions@freebsd.org Received: from digital.csudsu.com (digital.csudsu.com [209.249.57.102]) by hub.freebsd.org (Postfix) with ESMTP id F341B37B424 for ; Fri, 20 Apr 2001 10:41:12 -0700 (PDT) (envelope-from stefan@csudsu.com) Received: by digital.csudsu.com (Postfix, from userid 1000) id C825022E01; Fri, 20 Apr 2001 10:39:45 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by digital.csudsu.com (Postfix) with ESMTP id B8F151F002; Fri, 20 Apr 2001 10:39:45 -0700 (PDT) Date: Fri, 20 Apr 2001 10:39:45 -0700 (PDT) From: Stefan Molnar To: Vincent Poy Cc: Linh Pham , Jeremiah Gowdy , Charles Burns , , , , Subject: Re: the AMD factor in FreeBSD In-Reply-To: Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: owner-freebsd-questions@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.ORG What AMD did to get RISC86 was to buy NextGen. NextGen was a company in the mid/early 90s that devloped a new cpu that openly stated they converted "icky" CISC to "ohhh yeah" RISC. It had a few design issues. - Needed it's own Motherboard (very very odd layout) - Needed it's own Northbridge - You could buy it with and without a FPU AMD bought NextGen, and used their knowlage of the x86, intel chipsets, and Socket 7 layout and design and shoved the NextGen core and bits into a Socket 7 Package. Thus the K6 was born On Thu, 19 Apr 2001, Vincent Poy wrote: > On Thu, 19 Apr 2001, Linh Pham wrote: > > > On 2001-04-19, Vincent Poy scribbled: > > > > # Somehow I thought the Intel and AMD x86 CPUs were CISC and had a > > # portion that was RISC. > > > > AMD uses their RISC86 engine to turn crummy x86 instructions into > > RISC-like instructions to crunch them more efficiently as it can. The > > Pentium III processors do something like that since the P6 core, but the > > original P6 core sucked at 16-bit code... so Intel had to reduce the > > optimizations in the Out-of-Order engine to increase 16-bit performance > > in the Pentium II. > > Interesting. I guess I never read about how AMD did it... I just > remember reading a comparison of the Pentium versus the PowerPC 603 I > think and it somehow gave the indication that Intel CPU's were CISC > with RISC and the PowerPC was 100% RISC. > > > In reality... the x86 processors and, what people tend to call, RISC > > processors now are really post-RISC. Trying to expand IPC and increase > > Mhz :) Intel went the opposite with the P4. > > True but speaking about AMD, PIII and the likes, where does the > Xeon fit in? > > > Cheers, > Vince - vince@WURLDLINK.NET - Vice President ________ __ ____ > Unix Networking Operations - FreeBSD-Real Unix for Free / / / / | / |[__ ] > WurldLink Corporation / / / / | / | __] ] > San Francisco - Honolulu - Hong Kong / / / / / |/ / | __] ] > HongKong Stars/Gravis UltraSound Mailing Lists Admin /_/_/_/_/|___/|_|[____] > Almighty1@IRC - oahu.DAL.NET Hawaii's DALnet IRC Network Server Admin > > > > To Unsubscribe: send mail to majordomo@FreeBSD.org > with "unsubscribe freebsd-questions" in the body of the message > > To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-questions" in the body of the message