From owner-svn-src-all@freebsd.org Thu Jan 9 10:26:37 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 99A351E8D90; Thu, 9 Jan 2020 10:26:37 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 47tj2j3cXJz3R8t; Thu, 9 Jan 2020 10:26:37 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 7768427533; Thu, 9 Jan 2020 10:26:37 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 009AQb5S086276; Thu, 9 Jan 2020 10:26:37 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 009AQblu086275; Thu, 9 Jan 2020 10:26:37 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <202001091026.009AQblu086275@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Thu, 9 Jan 2020 10:26:37 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r356550 - head/sys/arm64/include X-SVN-Group: head X-SVN-Commit-Author: andrew X-SVN-Commit-Paths: head/sys/arm64/include X-SVN-Commit-Revision: 356550 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 09 Jan 2020 10:26:37 -0000 Author: andrew Date: Thu Jan 9 10:26:36 2020 New Revision: 356550 URL: https://svnweb.freebsd.org/changeset/base/356550 Log: Add atomic_testandset/clear on arm64. These will reportedly be used in future uma changes. MFC after: 2 weeks Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D23019 Modified: head/sys/arm64/include/atomic.h Modified: head/sys/arm64/include/atomic.h ============================================================================== --- head/sys/arm64/include/atomic.h Thu Jan 9 10:05:45 2020 (r356549) +++ head/sys/arm64/include/atomic.h Thu Jan 9 10:26:36 2020 (r356550) @@ -548,7 +548,87 @@ atomic_store_rel_64(volatile uint64_t *p, uint64_t val : "memory"); } +static __inline int +atomic_testandclear_32(volatile uint32_t *p, u_int val) +{ + uint32_t mask, old, tmp; + int res; + mask = 1u << (val & 0x1f); + __asm __volatile( + "1: ldxr %w2, [%3] \n" + " bic %w0, %w2, %w4 \n" + " stxr %w1, %w0, [%3] \n" + " cbnz %w1, 1b \n" + : "=&r"(tmp), "=&r"(res), "=&r"(old) + : "r" (p), "r" (mask) + : "memory" + ); + + return ((old & mask) != 0); +} + +static __inline int +atomic_testandclear_64(volatile uint64_t *p, u_int val) +{ + uint64_t mask, old, tmp; + int res; + + mask = 1ul << (val & 0x1f); + __asm __volatile( + "1: ldxr %2, [%3] \n" + " bic %0, %2, %4 \n" + " stxr %w1, %0, [%3] \n" + " cbnz %w1, 1b \n" + : "=&r"(tmp), "=&r"(res), "=&r"(old) + : "r" (p), "r" (mask) + : "memory" + ); + + return ((old & mask) != 0); +} + +static __inline int +atomic_testandset_32(volatile uint32_t *p, u_int val) +{ + uint32_t mask, old, tmp; + int res; + + mask = 1u << (val & 0x1f); + __asm __volatile( + "1: ldxr %w2, [%3] \n" + " orr %w0, %w2, %w4 \n" + " stxr %w1, %w0, [%3] \n" + " cbnz %w1, 1b \n" + : "=&r"(tmp), "=&r"(res), "=&r"(old) + : "r" (p), "r" (mask) + : "memory" + ); + + return ((old & mask) != 0); +} + +static __inline int +atomic_testandset_64(volatile uint64_t *p, u_int val) +{ + uint64_t mask, old, tmp; + int res; + + mask = 1ul << (val & 0x1f); + __asm __volatile( + "1: ldxr %2, [%3] \n" + " orr %0, %2, %4 \n" + " stxr %w1, %0, [%3] \n" + " cbnz %w1, 1b \n" + : "=&r"(tmp), "=&r"(res), "=&r"(old) + : "r" (p), "r" (mask) + : "memory" + ); + + return ((old & mask) != 0); +} + + #define atomic_add_int atomic_add_32 #define atomic_fcmpset_int atomic_fcmpset_32 #define atomic_clear_int atomic_clear_32 @@ -558,6 +638,8 @@ atomic_store_rel_64(volatile uint64_t *p, uint64_t val #define atomic_set_int atomic_set_32 #define atomic_swap_int atomic_swap_32 #define atomic_subtract_int atomic_subtract_32 +#define atomic_testandclear_int atomic_testandclear_32 +#define atomic_testandset_int atomic_testandset_32 #define atomic_add_acq_int atomic_add_acq_32 #define atomic_fcmpset_acq_int atomic_fcmpset_acq_32 @@ -584,6 +666,8 @@ atomic_store_rel_64(volatile uint64_t *p, uint64_t val #define atomic_set_long atomic_set_64 #define atomic_swap_long atomic_swap_64 #define atomic_subtract_long atomic_subtract_64 +#define atomic_testandclear_long atomic_testandclear_64 +#define atomic_testandset_long atomic_testandset_64 #define atomic_add_ptr atomic_add_64 #define atomic_fcmpset_ptr atomic_fcmpset_64