Date: Tue, 21 Feb 2012 17:22:26 -0500 From: Patrick Kelsey <kelsey@ieee.org> To: freebsd-mips@freebsd.org Subject: ar71xx SPI speed Message-ID: <CAD44qMX9ndkmdmT4Ba-7vJetJDv1HkhDpoFXUHYFT-cfPW4c5g@mail.gmail.com>
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Hi, I've been doing some SPI-related work on an AR7161-based board (MikroTik Routerboard RB450G, CPU @ 680 MHz, DDR @ 340 MHz, AHB @ 170 MHz), and I've noticed, via both software cyclecount and logic analyzer traces, that the SPI bus clock tops out in the neighborhood of 7 MHz or so. I can get a little more performance out of it if I manually unroll/debranch the loop in ar71xx_spi_txrx, but not terribly much. The (closed source) boot loader for this board manages something in the neighborhood of 8.5 MHz (perhaps due to not going through a bus abstraction layer in its code). 8MHz-ish does seem a bit lethargic for an SoC with otherwise fast moving parts, but I don't have any technical documentation on which to base a meaningful expectation. I'm wondering if anyone has had any experience with this SPI controller that either corroborates or contradicts this apparent speed limit. Thanks, Patrick
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