From owner-freebsd-smp  Thu Nov  4  5:47:35 1999
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Date: Thu, 04 Nov 1999 14:38:47 +0100
From: Thierry Herbelot <thierry.herbelot@alcatel.fr>
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To: remy@synx.com
Cc: Joachim.Strombergson@emw.ericsson.se, freebsd-smp@FreeBSD.ORG
Subject: Re: Good SMP Motherboards
References: <199911041204.NAA05362@gw0.boostworks.com>
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Salut,

Remy Nonnenmacher wrote:
> 
[COUIC]
> - Linear interpolation for a Celeron 500 would lead to 2.80 Mkey/s which
> is nearly what gave the PIII. If this is exact, the performance/price
> ratio is outstanding.

This is exactly what I get with my BP6 and a pair of 333 O'Cd @ 500 MHz,
happily crunching for about one month, under the then-Current (the rc5
run was at the beginning just a test to validate the cooling system of
the box - I have to find time to try 550 MHz)

	TfH

> - This is a pure core test. Do not expect same ratio on dayly
> operations.
> - David Malone have a really interesting graph that shows impact of
> cache size and RAM speed over a core-intensive process. It can be found
> at : http://www.maths.tcd.ie/~dwmalone/comp/perf.ps and shows the L1,
> L2 and RAM speed and size steps.
> 
> Speculation:
> 
> Intel build the same core every time. If the cache runs full speed, it's
> a Xeon. If only half of the cache runs at full speed, it's a PIII, if a
> quarter of the cache runs at full speed it's a celeron. If the cache
> runs at half speed, it's a PII. If nothing works, back to the fundry.
> 
> Probably exagerated, but it's the basic idea.
> 
> RN.
> IeM
> 
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