From owner-svn-src-stable@freebsd.org Tue Dec 1 13:06:29 2020 Return-Path: Delivered-To: svn-src-stable@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 39B2B4A8CF5; Tue, 1 Dec 2020 13:06:29 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4Clj6F15Ntz3lWG; Tue, 1 Dec 2020 13:06:29 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 0FF781633D; Tue, 1 Dec 2020 13:06:29 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 0B1D6Sqv055179; Tue, 1 Dec 2020 13:06:28 GMT (envelope-from hselasky@FreeBSD.org) Received: (from hselasky@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 0B1D6QHF055167; Tue, 1 Dec 2020 13:06:26 GMT (envelope-from hselasky@FreeBSD.org) Message-Id: <202012011306.0B1D6QHF055167@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: hselasky set sender to hselasky@FreeBSD.org using -f From: Hans Petter Selasky Date: Tue, 1 Dec 2020 13:06:26 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r368224 - in stable/12/sys/dev/mlx5: . mlx5_core mlx5_en mlx5_ib X-SVN-Group: stable-12 X-SVN-Commit-Author: hselasky X-SVN-Commit-Paths: in stable/12/sys/dev/mlx5: . mlx5_core mlx5_en mlx5_ib X-SVN-Commit-Revision: 368224 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 01 Dec 2020 13:06:29 -0000 Author: hselasky Date: Tue Dec 1 13:06:26 2020 New Revision: 368224 URL: https://svnweb.freebsd.org/changeset/base/368224 Log: MFC r367718: Report EQE data upon CQ completion in mlx5core. Report EQE data upon CQ completion to let upper layers use this data. Linux commit: 4e0e2ea1886afe8c001971ff767f6670312a9b04 Sponsored by: Mellanox Technologies // NVIDIA Networking Modified: stable/12/sys/dev/mlx5/cq.h stable/12/sys/dev/mlx5/driver.h stable/12/sys/dev/mlx5/mlx5_core/mlx5_cq.c stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c stable/12/sys/dev/mlx5/mlx5_en/en.h stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_main.c stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_rx.c stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_tx.c stable/12/sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c stable/12/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/dev/mlx5/cq.h ============================================================================== --- stable/12/sys/dev/mlx5/cq.h Tue Dec 1 13:03:09 2020 (r368223) +++ stable/12/sys/dev/mlx5/cq.h Tue Dec 1 13:06:26 2020 (r368224) @@ -32,7 +32,7 @@ #include #include - +struct mlx5_eqe; struct mlx5_core_cq { u32 cqn; int cqe_sz; @@ -40,7 +40,7 @@ struct mlx5_core_cq { __be32 *arm_db; unsigned vector; int irqn; - void (*comp) (struct mlx5_core_cq *); + void (*comp) (struct mlx5_core_cq *, struct mlx5_eqe *); void (*event) (struct mlx5_core_cq *, int); struct mlx5_uar *uar; u32 cons_index; Modified: stable/12/sys/dev/mlx5/driver.h ============================================================================== --- stable/12/sys/dev/mlx5/driver.h Tue Dec 1 13:03:09 2020 (r368223) +++ stable/12/sys/dev/mlx5/driver.h Tue Dec 1 13:06:26 2020 (r368224) @@ -1021,7 +1021,7 @@ void mlx5_unregister_debugfs(void); int mlx5_eq_init(struct mlx5_core_dev *dev); void mlx5_eq_cleanup(struct mlx5_core_dev *dev); void mlx5_fill_page_array(struct mlx5_buf *buf, __be64 *pas); -void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn); +void mlx5_cq_completion(struct mlx5_core_dev *dev, struct mlx5_eqe *eqe); void mlx5_rsc_event(struct mlx5_core_dev *dev, u32 rsn, int event_type); void mlx5_srq_event(struct mlx5_core_dev *dev, u32 srqn, int event_type); struct mlx5_core_srq *mlx5_core_get_srq(struct mlx5_core_dev *dev, u32 srqn); Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_cq.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_core/mlx5_cq.c Tue Dec 1 13:03:09 2020 (r368223) +++ stable/12/sys/dev/mlx5/mlx5_core/mlx5_cq.c Tue Dec 1 13:06:26 2020 (r368224) @@ -56,13 +56,16 @@ mlx5_cq_table_write_unlock(struct mlx5_cq_table *table NET_EPOCH_WAIT(); } -void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn) +void mlx5_cq_completion(struct mlx5_core_dev *dev, struct mlx5_eqe *eqe) { struct mlx5_cq_table *table = &dev->priv.cq_table; struct mlx5_core_cq *cq; struct epoch_tracker et; + u32 cqn; bool do_lock; + cqn = be32_to_cpu(eqe->data.comp.cqn) & 0xffffff; + NET_EPOCH_ENTER_ET(et); do_lock = atomic_read(&table->writercount) != 0; @@ -79,7 +82,7 @@ void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 if (likely(cq != NULL)) { ++cq->arm_sn; - cq->comp(cq); + cq->comp(cq, eqe); } else { mlx5_core_warn(dev, "Completion event for bogus CQ 0x%x\n", cqn); Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c Tue Dec 1 13:03:09 2020 (r368223) +++ stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c Tue Dec 1 13:06:26 2020 (r368224) @@ -246,8 +246,7 @@ static int mlx5_eq_int(struct mlx5_core_dev *dev, stru eq->eqn, eqe_type_str(eqe->type)); switch (eqe->type) { case MLX5_EVENT_TYPE_COMP: - cqn = be32_to_cpu(eqe->data.comp.cqn) & 0xffffff; - mlx5_cq_completion(dev, cqn); + mlx5_cq_completion(dev, eqe); break; case MLX5_EVENT_TYPE_PATH_MIG: Modified: stable/12/sys/dev/mlx5/mlx5_en/en.h ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_en/en.h Tue Dec 1 13:03:09 2020 (r368223) +++ stable/12/sys/dev/mlx5/mlx5_en/en.h Tue Dec 1 13:06:26 2020 (r368224) @@ -147,7 +147,7 @@ MALLOC_DECLARE(M_MLX5EN); struct mlx5_core_dev; struct mlx5e_cq; -typedef void (mlx5e_cq_comp_t)(struct mlx5_core_cq *); +typedef void (mlx5e_cq_comp_t)(struct mlx5_core_cq *, struct mlx5_eqe *); #define mlx5_en_err(_dev, format, ...) \ if_printf(_dev, "ERR: ""%s:%d:(pid %d): " format, \ @@ -1087,8 +1087,8 @@ int mlx5e_open_locked(struct ifnet *); int mlx5e_close_locked(struct ifnet *); void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, int event); -void mlx5e_rx_cq_comp(struct mlx5_core_cq *); -void mlx5e_tx_cq_comp(struct mlx5_core_cq *); +mlx5e_cq_comp_t mlx5e_rx_cq_comp; +mlx5e_cq_comp_t mlx5e_tx_cq_comp; struct mlx5_cqe64 *mlx5e_get_cqe(struct mlx5e_cq *cq); void mlx5e_dim_work(struct work_struct *); Modified: stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_main.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_main.c Tue Dec 1 13:03:09 2020 (r368223) +++ stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_main.c Tue Dec 1 13:06:26 2020 (r368224) @@ -1887,7 +1887,7 @@ mlx5e_drain_sq(struct mlx5e_sq *sq) mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { mtx_unlock(&sq->lock); msleep(1); - sq->cq.mcq.comp(&sq->cq.mcq); + sq->cq.mcq.comp(&sq->cq.mcq, NULL); mtx_lock(&sq->lock); } mtx_unlock(&sq->lock); @@ -1905,7 +1905,7 @@ mlx5e_drain_sq(struct mlx5e_sq *sq) mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { mtx_unlock(&sq->lock); msleep(1); - sq->cq.mcq.comp(&sq->cq.mcq); + sq->cq.mcq.comp(&sq->cq.mcq, NULL); mtx_lock(&sq->lock); } mtx_unlock(&sq->lock); @@ -2200,7 +2200,7 @@ mlx5e_open_channel(struct mlx5e_priv *priv, /* poll receive queue initially */ NET_EPOCH_ENTER_ET(et); - c->rq.cq.mcq.comp(&c->rq.cq.mcq); + c->rq.cq.mcq.comp(&c->rq.cq.mcq, NULL); NET_EPOCH_EXIT_ET(et); return (0); @@ -3760,7 +3760,7 @@ mlx5e_disable_rx_dma(struct mlx5e_channel *ch) while (!mlx5_wq_ll_is_empty(&rq->wq)) { msleep(1); NET_EPOCH_ENTER_ET(et); - rq->cq.mcq.comp(&rq->cq.mcq); + rq->cq.mcq.comp(&rq->cq.mcq, NULL); NET_EPOCH_EXIT_ET(et); } @@ -3793,7 +3793,7 @@ mlx5e_enable_rx_dma(struct mlx5e_channel *ch) rq->enabled = 1; NET_EPOCH_ENTER_ET(et); - rq->cq.mcq.comp(&rq->cq.mcq); + rq->cq.mcq.comp(&rq->cq.mcq, NULL); NET_EPOCH_EXIT_ET(et); } Modified: stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c Tue Dec 1 13:03:09 2020 (r368223) +++ stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c Tue Dec 1 13:06:26 2020 (r368224) @@ -232,7 +232,7 @@ mlx5e_rl_open_channel(struct mlx5e_rl_worker *rlw, int *ppsq = sq; /* poll TX queue initially */ - sq->cq.mcq.comp(&sq->cq.mcq); + sq->cq.mcq.comp(&sq->cq.mcq, NULL); return (0); Modified: stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_rx.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_rx.c Tue Dec 1 13:03:09 2020 (r368223) +++ stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_rx.c Tue Dec 1 13:06:26 2020 (r368224) @@ -497,7 +497,7 @@ wq_ll_pop: } void -mlx5e_rx_cq_comp(struct mlx5_core_cq *mcq) +mlx5e_rx_cq_comp(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe __unused) { struct mlx5e_rq *rq = container_of(mcq, struct mlx5e_rq, cq.mcq); int i = 0; Modified: stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_tx.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_tx.c Tue Dec 1 13:03:09 2020 (r368223) +++ stable/12/sys/dev/mlx5/mlx5_en/mlx5_en_tx.c Tue Dec 1 13:06:26 2020 (r368224) @@ -673,7 +673,7 @@ select_queue: } void -mlx5e_tx_cq_comp(struct mlx5_core_cq *mcq) +mlx5e_tx_cq_comp(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe __unused) { struct mlx5e_sq *sq = container_of(mcq, struct mlx5e_sq, cq.mcq); Modified: stable/12/sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c Tue Dec 1 13:03:09 2020 (r368223) +++ stable/12/sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c Tue Dec 1 13:06:26 2020 (r368224) @@ -31,7 +31,7 @@ #include #include "mlx5_ib.h" -static void mlx5_ib_cq_comp(struct mlx5_core_cq *cq) +static void mlx5_ib_cq_comp(struct mlx5_core_cq *cq, struct mlx5_eqe *eqe __unused) { struct ib_cq *ibcq = &to_mibcq(cq)->ibcq; Modified: stable/12/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c Tue Dec 1 13:03:09 2020 (r368223) +++ stable/12/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c Tue Dec 1 13:06:26 2020 (r368224) @@ -2459,7 +2459,7 @@ static void mlx5_ib_handle_internal_error(struct mlx5_ * lock/unlock above locks Now need to arm all involved CQs. */ list_for_each_entry(mcq, &cq_armed_list, reset_notify) { - mcq->comp(mcq); + mcq->comp(mcq, NULL); } spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); }