From owner-freebsd-arm@FreeBSD.ORG Thu Dec 19 16:57:31 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 0CCE249C for ; Thu, 19 Dec 2013 16:57:31 +0000 (UTC) Received: from mail-ie0-f177.google.com (mail-ie0-f177.google.com [209.85.223.177]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id C8AF312D0 for ; Thu, 19 Dec 2013 16:57:30 +0000 (UTC) Received: by mail-ie0-f177.google.com with SMTP id tp5so1687950ieb.36 for ; Thu, 19 Dec 2013 08:57:30 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:subject:mime-version:content-type:from :in-reply-to:date:cc:content-transfer-encoding:message-id:references :to; bh=+Z8TdOd62Hx5dqpwpODysFUEdYUxrarlZTL4UQ8l/Fs=; b=d9YoxeZHr5ljSGjJ4K4shtLFpc1XGNJFIqdNar0uU6ZEl6ZCIybtTM893bvS6FLbpe sZ7LnGL2NroJdOMMWZjpWefLJYp/L6qzPM4yEPil/ifcexhLoAy+ab7XF1B3RRFPTCiH FbQNiM9TRK3RMCyTIXtVN3f6C+6FqFOaPAGh1NP/WR2P1YIdV3vkccTAv+LxoV29xATc RrzY10lHDxxSBGBVCCRoPnaI+mRMCgGPhS1esnMsDMNeYJT0UzPlCl1uWLwpaeq5SIbF HftJVymi4TLOKTWiHiCF442/HYxphZjejaGc+5Wso02bK70DLZf6UcSv+vxBotoBO7qD PneQ== X-Gm-Message-State: ALoCoQkQiF1Mj6iNunEXngssf/VRnWREi51ZSnBW2wCkeQ0q7/JFHayxabqspZ7oJTupCw3FLpMx X-Received: by 10.50.254.165 with SMTP id aj5mr3271114igd.0.1387472249903; Thu, 19 Dec 2013 08:57:29 -0800 (PST) Received: from monkey-bot.int.fusionio.com ([209.117.142.2]) by mx.google.com with ESMTPSA id o1sm7931755igh.9.2013.12.19.08.57.28 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 19 Dec 2013 08:57:29 -0800 (PST) Sender: Warner Losh Subject: Re: RFC: ARM related fixes - GIC, cache line size, PCI FDT & AHCI Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: <52B2D744.3090003@semihalf.com> Date: Thu, 19 Dec 2013 09:57:27 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: <19C83857-E4CB-4A0B-96EC-4F6120A235D5@bsdimp.com> References: <52AF3D06.2000004@semihalf.com> <52B2D744.3090003@semihalf.com> To: Zbigniew Bodek X-Mailer: Apple Mail (2.1085) Cc: "freebsd-arm@freebsd.org" , br@freebsd.org, Olivier Houchard X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 19 Dec 2013 16:57:31 -0000 Just one comment below: On Dec 19, 2013, at 4:23 AM, Zbigniew Bodek wrote: > Hello Warner, >=20 > Thanks for your review. > Please see below. >=20 > Best regards > zbb >=20 > On 16.12.2013 22:50, Warner Losh wrote: >>=20 >> On Dec 16, 2013, at 10:48 AM, Zbigniew Bodek wrote: >>=20 >>> Hello Everyone. >>>=20 >>> We would like to submit some new patches recently developed by = Semihalf. >>=20 >> Thanks for your efforts here. Would there be a need to MFC these = patches to 10 and/or 9? > [ZBB] We can take a look at that after committing to current. >>=20 >>> You can find them here: >>> http://people.freebsd.org/~zbb/Semihalf/12.2013/ >>>=20 >>> Detailed description is available in the commit logs but in general: >>>=20 >>> -- 0001-Resolve-cache-line-size-using-CP15.patch >>> - use cache line size acquired in runtime >>=20 >> This looks good (assuming the register definitions are good, I didn't = verify them). Might be useful to publish these values to userland = somehow, maybe via a sysctl. This is option, but would be nice to have. >>=20 >> Would also be good to have USB_ALIGN kassert if using USB and this = value is < that macro. >>=20 >> Do other, older CPUs need similar decoding, or are the hard-wired = values good? > [ZBB] I have no knowledge about that. Someone who is using older ARMs > should take a look. I'll try to take a look, but I only have the armv5 gear to look at. I'm = most concerned about RPi... Warner >>=20 >>> -- 0002-GIC-polarity-and-level-support.patch >>> - suport for setting trigger level and polarity in GIC >>=20 >> This one seems to be OK, but is complicated enough that more eyeballs = and testing would be good.... > [ZBB] OK. Someone is testing this right now. >>=20 >>> -- 0003-Add-PCI-FDT-interrupt-trigger-polarity-parsing.patch >>> - trigger and polarity parsing for PCI FDT interrupts >>=20 >> This patch might conflict. >>=20 >> + if (trig) >> + *trig =3D tmp_trig; >> + if (pol) >> + *pol =3D tmp_pol; >>=20 >> Are not zero values also valid? > [ZBB] Yeah. We will skip this patch for now. >>=20 >>> -- 0004-Do-not-attach-to-bridges-in-AHCI-driver.patch >>=20 >> I'd add the word 'PCI' before bridge in the comment, otherwise this = looks good. > [ZBB] OK. >>=20 >>> -- 0005-Use-only-mapped-BIOs-on-ARM.patch >>=20 >> A comment about what MVA is would be useful.. Otherwise does what it = says. > [ZBB]. This should refer to just Virtual Address (not "Modified") so = we > will change it back to VA. >>=20 >>> - Two patches enabling the AHCI driver on ARM chips >>=20 >> I didn't see these. Did I miss something? Or is the unmapped stuff = all it takes? > [ZBB] Yes, I meant the two above(0004 && 0005). >>=20 >>> We will appreciate if you could post your comments and/or remarks by = the >>> end of this week when we plan to commit the changes. >>>=20 >>> Best regards >>> zbb >>> _______________________________________________ >>> freebsd-arm@freebsd.org mailing list >>> http://lists.freebsd.org/mailman/listinfo/freebsd-arm >>> To unsubscribe, send any mail to = "freebsd-arm-unsubscribe@freebsd.org" >>=20 >=20