Skip site navigation (1)Skip section navigation (2)
Date:      Wed, 04 Dec 1996 22:27:25 +0800
From:      Peter Wemm <peter@spinner.dialix.com>
To:        Terje Normann Marthinussen <Terje.N.Marthinussen@cc.uit.no>
Cc:        smp@freebsd.org
Subject:   Re: Crashing on activating other CPUs 
Message-ID:  <199612041427.WAA01519@spinner.DIALix.COM>
In-Reply-To: Your message of "Wed, 04 Dec 1996 15:18:51 %2B0100." <199612041418.PAA03009@slibo.cc.uit.no> 

next in thread | previous in thread | raw e-mail | index | archive | help
Terje Normann Marthinussen wrote:
> However, after recompiling with DDB, I got:
> cpunumber = 0
> instruction pointer     = 0x8:0xf010d5ad
> stack pointer           = 0x10:0xefbfff68
> frame pointer           = 0x10:0xefbfff6c
> code segment            = base 0x0, limit 0xfffff, type 0x1b
>                         = DPL 0, pres 1, def32 1, gran 1
> processor eflags        = interrupt enabled, IOPL = 0
> current process         = 6 (cpuidle1)
> interrupt mask          = 
> kernel: type 29 trap, code=0
> Stopped at      _smp_idleloop+0x3d:     andl    $0xf000000,%eax
> db> trace
> _smp_idleloop(f40c14d7,f010d369,1,f01e8294,f01ee958) at _smp_idleloop+0x3d
> _smp_kickoff(0) at _smp_kickoff+0x97
> _main(efbfffb8,f011cec0,f01ba140,8000000,5,0,efbffff4,f01bd450,f01bcbe3,80000
    011
> ,30,22ff00,233000) at _main+0x92

Hmm!!  I do not understand this at all...  How can an 'and' between an
immediate and a register generate a trap???

Are you using a P6?  Perhaps they have an extra trap or two defined for
some new condition?

Cheers,
-Peter



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199612041427.WAA01519>