From owner-svn-src-head@FreeBSD.ORG Mon May 3 14:40:22 2010 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id C21541065673; Mon, 3 May 2010 14:40:22 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from cyrus.watson.org (cyrus.watson.org [65.122.17.42]) by mx1.freebsd.org (Postfix) with ESMTP id 926CE8FC2C; Mon, 3 May 2010 14:40:22 +0000 (UTC) Received: from bigwig.baldwin.cx (66.111.2.69.static.nyinternet.net [66.111.2.69]) by cyrus.watson.org (Postfix) with ESMTPSA id 466D046B2C; Mon, 3 May 2010 10:40:22 -0400 (EDT) Received: from jhbbsd.localnet (smtp.hudson-trading.com [209.249.190.9]) by bigwig.baldwin.cx (Postfix) with ESMTPA id 7EB358A025; Mon, 3 May 2010 10:40:21 -0400 (EDT) From: John Baldwin To: "M. Warner Losh" Date: Mon, 3 May 2010 10:21:03 -0400 User-Agent: KMail/1.12.1 (FreeBSD/7.3-CBSD-20100217; KDE/4.3.1; amd64; ; ) References: <201005011636.o41GaFsK084343@svn.freebsd.org> <9624CC6A-EEB1-4492-9E62-7ACD0BF6F39C@gsoft.com.au> <20100501.194758.49280345204940330.imp@bsdimp.com> In-Reply-To: <20100501.194758.49280345204940330.imp@bsdimp.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201005031021.03746.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.0.1 (bigwig.baldwin.cx); Mon, 03 May 2010 10:40:21 -0400 (EDT) X-Virus-Scanned: clamav-milter 0.95.1 at bigwig.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=-2.6 required=4.2 tests=AWL,BAYES_00 autolearn=ham version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on bigwig.baldwin.cx Cc: svn-src-head@freebsd.org, doconnor@gsoft.com.au, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r207472 - in head/sys: conf dev/ath/ath_hal/ar5212 X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 May 2010 14:40:22 -0000 On Saturday 01 May 2010 9:47:58 pm M. Warner Losh wrote: > In message: <9624CC6A-EEB1-4492-9E62-7ACD0BF6F39C@gsoft.com.au> > "Daniel O'Connor" writes: > : > : On 02/05/2010, at 2:06 AM, Warner Losh wrote: > : > Unfortunately, this condition is impossible to detect at runtime > : > without MIPS specific ifdefs. Rather than cast an overly-broad net > : > like Linux/OpenWRT dues (which enables this workaround all the time on > : > MIPS32 platforms), we put this option in the kernel for just the > : > affected machines. Sam didn't like this aspect of the patch when he > : > reviewed it, and I'd love to hear sane proposals on how to fix it :) > : > : Could you do TUNABLE_INT in the MIPS code and TUNABLE_INT_FETCH in ath_hal? > > How is that better than a kernel option? The only place this would > ever happen is atheros AR71xx SoC. It isn't like some of the Atheros > 71xx SoCs would have it and some wouldn't. > > And besides, kenv has to be compiled into the kernel on MIPS these > days... > > The only thing close to an idea I've had is to add: > > __weak int > ath_needs_dma_war() > { > return 0; > } > > and have this in the mips: > > int needs_ath_dma_war = 0; > __weak int ath_needs_dma_war() > { > return needs_ath_dma_war; > } > > and set it to 1 in the AR71xx CPU initialization. But that seemed > kind of lame... I think a kernel option is fine for this case. -- John Baldwin