Date: Thu, 14 Sep 1995 10:02:04 +0200 (MET DST) From: "Joachim Koenig" <joachim@microdesk8.ee.uni-sb.de> To: luigi@labinfo.iet.unipi.it (Luigi Rizzo) Cc: hackers@FreeBSD.ORG Subject: Re: EPP/ECP parallel port modes ? Message-ID: <9509140802.AA14755@microdesk8.ee.uni-sb.de> In-Reply-To: <199509131711.TAA01954@labinfo.iet.unipi.it> from "Luigi Rizzo" at Sep 13, 95 07:11:43 pm
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Luigi Rizzo wrote: >Does anyone know what are the various operating modes available on the >newer parallel ports ? The controllers report the following: > > SPP EPP ECP > >I believe SPP is the standard mode, EPP might be the bidirectional mode >(but don't know if the handshake lines change), and have no idea of >what ECP stands for. There are two things to consider: 1) IEEE1284-standard: This standard defines some operation modes for parallel connections as view of the cable signals. Among these are SPP: standard parallel port mode EPP: enhanced parallel port mode ECP: enhanced capabilities port mode An IEEE1284 complying device starts up in SPP-mode and the standard defines signal sequences to detect, if a peripheral supports these enhanced modes and to switch to/from these modes. In principle, these enhanced modes give a stable communication protocol by using some kind of 4-edge handshake. By using harder timing requirements, higher communication speeds are also possible (up to about 2MB/sec) EPP and ECP are bidirectional, half duplex communication modes. In order to use these with a standard PC parallel port, the data lines must be capable of being tristated (known as PS2-mode). But these modes can be implemented in software, that is by programming the control-lines and analyzing the status lines. The standard also defines two reverse modes with standard parallel ports, one 8 bit bidirectional mode, requiring a tristatable data port and a 4 bit wide nibble mode, where the reverse information (from the peripheral) is send over the status lines. All HP Laserjet 4 and 5 printers implement nibble mode. But this software-approach does not lead to higher transmission speeds, because a lot of (slow) port accesses are needed to implement the complex handshake. So, to achieve higher speeds, these modes have to be implemented in hardware! And this is not defined in IEEE1284. But ..... 2) Microsoft/HP specification of an IEEE1284 compliant parallel port, as seen on the ISA bus This specification is some kind of a mirror of the cable signals as ISA port signals at some base + offset addresses plus some words to hardware implementation of the E*P modes and how to enable/disable them (again controlled via ports at some specific offsets) To make things a bit more complicated, some control/status signals are inverted between cable and what the CPU sees (port), and some are not. Typically, hardware implementations of EPP do the handshaking without control and status port accesses, once enabled. One drawback is that they keep the ISA bus occupied until the data has been received and acknowledged by the reciever. To avoid bus hangups if the device does not respond quickly enough, it generates an interrupt after a some microseconds in this case. But if the device is fast enough, high transmission speeds are possible. ECP on the other hand uses FIFOs and DMA to speed things up even more, with less overhead for a UNIX like operating system. The FIFO mode can even be used for the SPP mode in forward direction. The additional control/status/configuration ports of such a device are at base+400+offset. This does not conflict with other devices as only 10 bits are normally decoded for ISA ports, which masks out the 1 in 400, giving the same addresses as base + offset which correspond to the parallel port. There are currently only few peripherals, which support these enhanced modes, but some hardware implementations of EPP & ECP are available for the ISA bus: SMC FDC37C665, SMC FDC37C666 from Standard Microsystems Corp. A similar chip by National Semiconductor an Intel Chip (sorry, no number). So, what about a driver? I've written an IEEE1284 device driver, which implements parallel port fifo mode, nibble and byte reverse mode, but not yet EPP,ECP because of lacking peripherals supporting these, but the hooks are there. It's still alpha I think, but I would appreciate some testers, so write me some email, if you are interested. One minor glitch: I've written it for NetBSD, but the differences for FreeBSD should be small. Joachim -- email: joachim@ee.uni-sb.de University of Saarland, Germany, Europe phone: +49 681 3023043 suffering should be creative, fax: 2678 should give birth to something good and lovely <Ende der Fahnenstange>
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