From owner-svn-src-all@freebsd.org Thu Nov 7 23:34:42 2019 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 069F317E1C8; Thu, 7 Nov 2019 23:34:42 +0000 (UTC) (envelope-from markj@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 478KW563Dhz4X3X; Thu, 7 Nov 2019 23:34:41 +0000 (UTC) (envelope-from markj@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id B2EAD1D72E; Thu, 7 Nov 2019 23:34:41 +0000 (UTC) (envelope-from markj@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id xA7NYfWE073658; Thu, 7 Nov 2019 23:34:41 GMT (envelope-from markj@FreeBSD.org) Received: (from markj@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id xA7NYfiC073657; Thu, 7 Nov 2019 23:34:41 GMT (envelope-from markj@FreeBSD.org) Message-Id: <201911072334.xA7NYfiC073657@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: markj set sender to markj@FreeBSD.org using -f From: Mark Johnston Date: Thu, 7 Nov 2019 23:34:41 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r354500 - head/sys/dev/iwm X-SVN-Group: head X-SVN-Commit-Author: markj X-SVN-Commit-Paths: head/sys/dev/iwm X-SVN-Commit-Revision: 354500 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Nov 2019 23:34:42 -0000 Author: markj Date: Thu Nov 7 23:34:41 2019 New Revision: 354500 URL: https://svnweb.freebsd.org/changeset/base/354500 Log: iwm: Add 9000-series RX register definitions. MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Modified: head/sys/dev/iwm/if_iwmreg.h Modified: head/sys/dev/iwm/if_iwmreg.h ============================================================================== --- head/sys/dev/iwm/if_iwmreg.h Thu Nov 7 23:34:28 2019 (r354499) +++ head/sys/dev/iwm/if_iwmreg.h Thu Nov 7 23:34:41 2019 (r354500) @@ -1527,6 +1527,52 @@ static inline unsigned int IWM_FH_MEM_CBBC_QUEUE(unsig #define IWM_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT 28 +/* 9000 rx series registers */ + +#define IWM_RFH_Q0_FRBDCB_BA_LSB 0xa08000 +#define IWM_RFH_Q_FRBDCB_BA_LSB (IWM_RFH_Q0_FRBDCB_BA_LSB + (q) * 8) +/* Write index table */ +#define IWM_RFH_Q0_FRBDCB_WIDX 0xa08080 +#define IWM_RFH_Q_FRBDCB_WIDX (IWM_RFH_Q0_FRBDCB_WIDX + (q) * 4) +/* Write index table - shadow registers */ +#define IWM_RFH_Q0_FRBDCB_WIDX_TRG 0x1c80 +#define IWM_RFH_Q_FRBDCB_WIDX_TRG (IWM_RFH_Q0_FRBDCB_WIDX_TRG + (q) * 4) +/* Read index table */ +#define IWM_RFH_Q0_FRBDCB_RIDX 0xa080c0 +#define IWM_RFH_Q_FRBDCB_RIDX (IWM_RFH_Q0_FRBDCB_RIDX + (q) * 4) +/* Used list table */ +#define IWM_RFH_Q0_URBDCB_BA_LSB 0xa08100 +#define IWM_RFH_Q_URBDCB_BA_LSB (IWM_RFH_Q0_URBDCB_BA_LSB + (q) * 8) +/* Write index table */ +#define IWM_RFH_Q0_URBDCB_WIDX 0xa08180 +#define IWM_RFH_Q_URBDCB_WIDX (IWM_RFH_Q0_URBDCB_WIDX + (q) * 4) +/* stts */ +#define IWM_RFH_Q0_URBD_STTS_WPTR_LSB 0xa08200 +#define IWM_RFH_Q_URBD_STTS_WPTR_LSB (IWM_RFH_Q0_URBD_STTS_WPTR_LSB + (q) * 8) + +#define IWM_RFH_GEN_STATUS 0xa09808 +#define IWM_RXF_DMA_IDLE 0x80000000 + +/* DMA configuration */ +#define IWM_RFH_RXF_DMA_CFG 0xa09820 +#define IWM_RFH_RXF_DMA_RB_SIZE_1K 0x00010000 +#define IWM_RFH_RXF_DMA_RB_SIZE_2K 0x00020000 +#define IWM_RFH_RXF_DMA_RB_SIZE_4K 0x00040000 +#define IWM_RFH_RXF_DMA_RBDCB_SIZE_512 0x00900000 +#define IWM_RFH_RXF_DMA_MIN_RB_4_8 0x03000000 +#define IWM_RFH_RXF_DMA_DROP_TOO_LARGE_MASK 0x04000000 +#define IWM_RFH_DMA_EN_ENABLE_VAL 0x80000000 + +#define IWM_RFH_GEN_CFG 0xa09800 +#define IWM_RFH_GEN_CFG_SERVICE_DMA_SNOOP 0x00000001 +#define IWM_RFH_GEN_CFG_RFH_DMA_SNOOP 0x00000002 +#define IWM_RFH_GEN_CFG_RB_CHUNK_SIZE_128 0x00000010 +#define IWM_RFH_GEN_CFG_RB_CHUNK_SIZE_64 0x00000000 + +#define IWM_RFH_RXF_RXQ_ACTIVE 0xa0980c + +/* end of 9000 rx series registers */ + /* TFDB Area - TFDs buffer table */ #define IWM_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK (0xFFFFFFFF) #define IWM_FH_TFDIB_LOWER_BOUND (IWM_FH_MEM_LOWER_BOUND + 0x900)