From owner-cvs-src@FreeBSD.ORG Wed Dec 28 05:40:07 2005 Return-Path: X-Original-To: cvs-src@freebsd.org Delivered-To: cvs-src@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id E7FE016A41F; Wed, 28 Dec 2005 05:40:07 +0000 (GMT) (envelope-from imp@bsdimp.com) Received: from harmony.bsdimp.com (vc4-2-0-87.dsl.netrack.net [199.45.160.85]) by mx1.FreeBSD.org (Postfix) with ESMTP id 590A343D49; Wed, 28 Dec 2005 05:40:07 +0000 (GMT) (envelope-from imp@bsdimp.com) Received: from localhost (localhost.village.org [127.0.0.1] (may be forged)) by harmony.bsdimp.com (8.13.3/8.13.3) with ESMTP id jBS5ZKDZ024260; Tue, 27 Dec 2005 22:35:20 -0700 (MST) (envelope-from imp@bsdimp.com) Date: Tue, 27 Dec 2005 22:35:31 -0700 (MST) Message-Id: <20051227.223531.128616574.imp@bsdimp.com> To: nate@root.org From: "M. Warner Losh" In-Reply-To: <43B1D120.9080604@root.org> References: <43B1CE9E.1060602@root.org> <43B1D121.1080309@samsco.org> <43B1D120.9080604@root.org> X-Mailer: Mew version 3.3 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-2.0 (harmony.bsdimp.com [127.0.0.1]); Tue, 27 Dec 2005 22:35:23 -0700 (MST) Cc: cvs-src@freebsd.org, scottl@samsco.org, glebius@freebsd.org, src-committers@freebsd.org, cvs-all@freebsd.org Subject: Re: cvs commit: src/sys/dev/em if_em.c X-BeenThere: cvs-src@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 28 Dec 2005 05:40:08 -0000 In message: <43B1D120.9080604@root.org> Nate Lawson writes: : Scott Long wrote: : > Nate Lawson wrote: : >> This probably means that the PCI memory space isn't fully initialized : >> but an interrupt has been triggered. If you then go and try to poke : >> the hardware, then you can hang the system. : >> : > : > I can believe your first statement, but not your second. Hanging the : > system on an aborted memory read cycle (as opposed to just throwing a : > #SERR) would indicate a highly highly broken chipset. In any case, if : > we ever implement PCI hotplug then we'll have to deal with the effects : > of aborted PCI transfers anyways. : > : > Scott : : It's not the PCI write that hangs the system, it's the behavior of the : device written to. It may never release the interrupt. Using an NMI to : debug would be good. Chances are there's a suprious interrupt (from the device's point of view) that gets into emintr. Since the em driver doesn't mark itself as 'suspended' and use that to short-circuit the ISR, we hit this problem. I think that this is most likely the problem... Warner