From owner-freebsd-mips@FreeBSD.ORG Wed May 2 21:37:10 2012 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0E3DC1065672 for ; Wed, 2 May 2012 21:37:10 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-pz0-f49.google.com (mail-pz0-f49.google.com [209.85.210.49]) by mx1.freebsd.org (Postfix) with ESMTP id D82808FC1B for ; Wed, 2 May 2012 21:37:09 +0000 (UTC) Received: by dadm1 with SMTP id m1so505288dad.8 for ; Wed, 02 May 2012 14:37:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:sender:date:x-google-sender-auth:message-id:subject :from:to:content-type; bh=uQO2Py7oufjuU8OyDKSLypqlJbOj/oM49s0HCdgOV+I=; b=UJzwR2w/IjxgRU7kiomFIqxA/dpaAQXQMXOmlMywpirJv/44Pe/o4oWk3Bm9wn0BpH ujJtE2Ohuxn8bes4TS9p7ZWo4pUX3c1Abhs9S+AEylLjdSR22WKj+XYyEJzVjbWndtLb zljPB1LPp4l4oReCZChJheX/o8mLMhXatxtJjGWKvzQM0T9bCslsoQyPaXRkSe65gUUf LQOeaCkPqm5QmXCU3JjITxgwisdHBCptUFKl6ciUDHdEoPntis0iWR57MlDtWrnoq+k0 t2CW1x6YkLzAz6BxqjHw42iPHwf4kV0ezZaMq+gK9KeNEfVgdGptH/Qw2qr+yZvavsEl ahcg== MIME-Version: 1.0 Received: by 10.68.227.134 with SMTP id sa6mr1054817pbc.101.1335994629531; Wed, 02 May 2012 14:37:09 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.142.101.9 with HTTP; Wed, 2 May 2012 14:37:09 -0700 (PDT) Date: Wed, 2 May 2012 14:37:09 -0700 X-Google-Sender-Auth: RU2uHnv0RhmOk_2iVnoGfZYUxnY Message-ID: From: Adrian Chadd To: freebsd-mips@freebsd.org Content-Type: text/plain; charset=ISO-8859-1 Subject: heads up - ar71xx changes X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 May 2012 21:37:10 -0000 Hi, there's been a few ar71xx changes in the last few days. I'd appreciate it if it got decent testing. * The miibus/mdiobus (optional) split from Stefan Bethke as preparation for the switch API; * The MII clock speed is now set when the MAC PLL is programmed (based on the port speed) - this happens for the AR71xx and AR913x. The AR724x doesn't need this; * New hints are available to override the PLL settings from the hard programmed defaults (again based on port speed and chip); * Allowed both arge0 and arge1's MII busses to be accessible - gonzo's initial commit had both MACs use the MII bus on arge0 - which is fine for AR71xx and AR913x, but not fine for AR724x (two MII busses) and later AR93xx/AR94xx SoCs. * A new hint is available which allows for the MII type (MII, RMII, GMII,RGMII) to be forcibly set at attach time. I've only tested this on the AR71xx + AR8316 switch PHY board. I haven't yet tested it on any AR71xx + normal PHY (eg the Ubiquiti LS-SR71) just to ensure that it works, but I'll do that tonight. I'll also try it on the Routerstation board, just to make sure that still works. I would appreciate it if others using the AR71xx, AR724x or AR913x embedded boards could give this a whirl and make sure ethernet still works. TODO (in case someone else would like to finish off ar724x support): * Add the AR7242 PLL programming for arge0; * Go through the ar724x fifo and PLL code in Linux Openwrt (dev-eth.c) and ensure that our code (ar724x_chip.c and if_arge.c) does the "right" things; * When a forced speed/duplex is set via ifconfig, the MAC stops successfully handling frames. I'll do some tests to see if I or others broke this feature (I don't recall using anything except autoneg until I first tried this a couple days ago) but it initially seems as if the arge PLL isn't being programmed when a static speed/duplex is defined. Thanks, Adrian