From owner-freebsd-hackers@FreeBSD.ORG Fri Oct 17 04:46:46 2003 Return-Path: Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 32FCB16A4C0; Fri, 17 Oct 2003 04:46:46 -0700 (PDT) Received: from xaqua.tel.fer.hr (xaqua.tel.fer.hr [161.53.19.25]) by mx1.FreeBSD.org (Postfix) with ESMTP id 8F12343F3F; Fri, 17 Oct 2003 04:46:44 -0700 (PDT) (envelope-from zec@tel.fer.hr) Received: by xaqua.tel.fer.hr (Postfix, from userid 20006) id 42FB49B644; Fri, 17 Oct 2003 13:46:43 +0200 (CEST) Received: from 161.53.19.14 (unknown [161.53.19.14]) by xaqua.tel.fer.hr (Postfix) with ESMTP id 7D4FE9B64D; Fri, 17 Oct 2003 13:46:41 +0200 (CEST) From: Marko Zec To: Ducrot Bruno Date: Fri, 17 Oct 2003 13:46:53 +0200 User-Agent: KMail/1.5 References: <200310170220.25356.zec@tel.fer.hr> <20031017092359.GF8668@poupinou.org> In-Reply-To: <20031017092359.GF8668@poupinou.org> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-2" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200310171346.53613.zec@tel.fer.hr> X-Spam-Checker-Version: SpamAssassin 2.60 (1.212-2003-09-23-exp) on xaqua.tel.fer.hr X-Spam-Level: X-Spam-Status: No, hits=-2.1 required=5.0 tests=AWL autolearn=no version=2.60 X-Sanitizer: Advosys mail filter cc: freebsd-hackers@freebsd.org cc: freebsd-mobile@freebsd.org Subject: Re: PATCH: Pentium-M deeper sleep support in idle loop X-BeenThere: freebsd-hackers@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Technical Discussions relating to FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 17 Oct 2003 11:46:46 -0000 On Friday 17 October 2003 11:23, Ducrot Bruno wrote: > In case of P-M (Banias), speedstep does work differently, and this will not > work. Be sure to disable speedstep stuff in such case (or implement it). True, the new "Centrino" CPUs are equipped with a slightly different speedstep control model, but have in mind that the speedstep support was only of marginal importance in my patch, as clearly stated in the original post. The main purpose of the patch is enabling deeper sleep mode in the idle loop, which is a completely independent feature from the speedstep. Furthermore, it should work across all -M pentium models in combination with ICH3 and ICH4 chipsets. I'd be more than glad to hear some feedback on if and how that works for people out there... > SpeedStep also work if ICH-2M, and it is easy to add it in your patch (but > probably not the deeper sleep stuff though, especially if you have an > older PIII, but sleep should be ok). If it's easy, then by all means go for it. Unfortunately I don't have any ICH2 based systems available for testing, so I'm 100% sure I won't be implementing it myself. Cheers, Marko