From owner-svn-src-all@FreeBSD.ORG Sun Feb 22 19:24:09 2015 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 929FB849; Sun, 22 Feb 2015 19:24:09 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 7CDC2A25; Sun, 22 Feb 2015 19:24:09 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t1MJO9Zl011944; Sun, 22 Feb 2015 19:24:09 GMT (envelope-from arybchik@FreeBSD.org) Received: (from arybchik@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t1MJO84j011941; Sun, 22 Feb 2015 19:24:08 GMT (envelope-from arybchik@FreeBSD.org) Message-Id: <201502221924.t1MJO84j011941@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: arybchik set sender to arybchik@FreeBSD.org using -f From: Andrew Rybchenko Date: Sun, 22 Feb 2015 19:24:08 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r279183 - head/sys/dev/sfxge/common X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 22 Feb 2015 19:24:09 -0000 Author: arybchik Date: Sun Feb 22 19:24:08 2015 New Revision: 279183 URL: https://svnweb.freebsd.org/changeset/base/279183 Log: sfxge: add common code support for changing TX queue pace To delay packets from a particular TX queue by a particular time, write a value into the TX Pace table s.t. pace time <= TX Pace Clock Period * (2 ^ pace value) - the TX pace clock is 1/13 of the system clock, so its period should be 104 or 52 ns depending on whether turbo mode is active. EFX_TX_PACE_CLOCK_BASE added by me. Submitted by: Mark Spender Sponsored by: Solarflare Communications, Inc. Approved by: gnn (mentor) Modified: head/sys/dev/sfxge/common/efx.h head/sys/dev/sfxge/common/efx_regs.h head/sys/dev/sfxge/common/efx_tx.c Modified: head/sys/dev/sfxge/common/efx.h ============================================================================== --- head/sys/dev/sfxge/common/efx.h Sun Feb 22 19:13:52 2015 (r279182) +++ head/sys/dev/sfxge/common/efx.h Sun Feb 22 19:24:08 2015 (r279183) @@ -1736,6 +1736,11 @@ efx_tx_qpost( __in unsigned int completed, __inout unsigned int *addedp); +extern __checkReturn int +efx_tx_qpace( + __in efx_txq_t *etp, + __in unsigned int ns); + extern void efx_tx_qpush( __in efx_txq_t *etp, Modified: head/sys/dev/sfxge/common/efx_regs.h ============================================================================== --- head/sys/dev/sfxge/common/efx_regs.h Sun Feb 22 19:13:52 2015 (r279182) +++ head/sys/dev/sfxge/common/efx_regs.h Sun Feb 22 19:24:08 2015 (r279183) @@ -34,6 +34,13 @@ extern "C" { #endif +/************************************************************************** + * + * Falcon/Siena registers and descriptors + * + ************************************************************************** + */ + /* * FR_AB_EE_VPD_CFG0_REG_SF(128bit): * SPI/VPD configuration register 0 @@ -3838,6 +3845,18 @@ extern "C" { #define FSF_AZ_DRIVER_EV_RX_DESCQ_ID_WIDTH 12 + +/************************************************************************** + * + * Falcon non-volatile configuration + * + ************************************************************************** + */ + + +#define FR_AZ_TX_PACE_TBL_OFST FR_BZ_TX_PACE_TBL_OFST + + #ifdef __cplusplus } #endif Modified: head/sys/dev/sfxge/common/efx_tx.c ============================================================================== --- head/sys/dev/sfxge/common/efx_tx.c Sun Feb 22 19:13:52 2015 (r279182) +++ head/sys/dev/sfxge/common/efx_tx.c Sun Feb 22 19:24:08 2015 (r279183) @@ -224,6 +224,53 @@ efx_tx_qpush( etp->et_index, &dword, B_FALSE); } +#define EFX_MAX_PACE_VALUE 20 +#define EFX_TX_PACE_CLOCK_BASE 104 + + __checkReturn int +efx_tx_qpace( + __in efx_txq_t *etp, + __in unsigned int ns) +{ + efx_nic_t *enp = etp->et_enp; + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_oword_t oword; + unsigned int pace_val; + unsigned int timer_period; + int rc; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + if (ns == 0) { + pace_val = 0; + } else { + /* + * The pace_val to write into the table is s.t + * ns <= timer_period * (2 ^ pace_val) + */ + timer_period = EFX_TX_PACE_CLOCK_BASE / encp->enc_clk_mult; + for (pace_val = 1; pace_val <= EFX_MAX_PACE_VALUE; pace_val++) { + if ((timer_period << pace_val) >= ns) + break; + } + } + if (pace_val > EFX_MAX_PACE_VALUE) { + rc = EINVAL; + goto fail1; + } + + /* Update the pacing table */ + EFX_POPULATE_OWORD_1(oword, FRF_AZ_TX_PACE, pace_val); + EFX_BAR_TBL_WRITEO(enp, FR_AZ_TX_PACE_TBL, etp->et_index, &oword); + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + void efx_tx_qflush( __in efx_txq_t *etp) @@ -234,6 +281,8 @@ efx_tx_qflush( EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + efx_tx_qpace(etp, 0); + label = etp->et_index; /* Flush the queue */