From owner-freebsd-mips@FreeBSD.ORG Tue Sep 14 02:07:36 2010 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 15B10106566C for ; Tue, 14 Sep 2010 02:07:36 +0000 (UTC) (envelope-from neelnatu@gmail.com) Received: from mail-ww0-f42.google.com (mail-ww0-f42.google.com [74.125.82.42]) by mx1.freebsd.org (Postfix) with ESMTP id A3DD08FC15 for ; Tue, 14 Sep 2010 02:07:35 +0000 (UTC) Received: by wwb18 with SMTP id 18so1090951wwb.1 for ; Mon, 13 Sep 2010 19:07:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:date:message-id :subject:from:to:content-type; bh=wTVugwUfXF9NyfNmLtLCRqIclTx2pE76qntv2bI2nUU=; b=m9AUklXpaoB92wKNCC4QubaqLGo8rxY6dek5MCByPIF7lVNstNWqZ05a9wd/3YRMtK AZQeXzPA4CJByxVCPNdnWowdN5csSNZaml0SZ6qzszgIYYcTbWldwTytWRcCTg7avHqf Kp4sUUTcX2y77UkEEX52cW5VHMb4ifYgMZXUQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:content-type; b=oYa5Obhjw1jbZ9UjMf8MDIw0cgE2XSEuWMZW1ccl7tsuYffx8PemCb0IxnDOozckmf bq44+M5fuX4pAjImIwsrWp1roxZ3C8CfrUbw8dAgwJ3aTfF+Sr5dPFHDzhGGhlzwppe2 0s90xnnWQHDZ/rm36yFb5KRVmoUU1DMLTnAck= MIME-Version: 1.0 Received: by 10.216.17.207 with SMTP id j57mr3303063wej.68.1284430054593; Mon, 13 Sep 2010 19:07:34 -0700 (PDT) Received: by 10.216.133.5 with HTTP; Mon, 13 Sep 2010 19:07:34 -0700 (PDT) Date: Mon, 13 Sep 2010 19:07:34 -0700 Message-ID: From: Neel Natu To: freebsd-mips@freebsd.org Content-Type: text/plain; charset=ISO-8859-1 Subject: PATCH: make usage of set_intr_mask() sane X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 14 Sep 2010 02:07:36 -0000 Hi, This patch changes the meaning of the 'mask' argument to 'set_intr_mask(mask)' to exactly match the meaning of the IM0..7 bits in the CP0 status register. The way we have it set up right now is exactly the opposite for no good reason IMHO. Please review and let me know if there are any objections. best Neel Index: sys/mips/sibyte/sb_machdep.c =================================================================== --- sys/mips/sibyte/sb_machdep.c (revision 212587) +++ sys/mips/sibyte/sb_machdep.c (working copy) @@ -370,7 +370,7 @@ */ clock_int_mask = hard_int_mask(5); ipi_int_mask = hard_int_mask(platform_ipi_intrnum()); - set_intr_mask(MIPS_SR_INT_MASK & ~(ipi_int_mask | clock_int_mask)); + set_intr_mask(ipi_int_mask | clock_int_mask); } int Index: sys/mips/include/cpufunc.h =================================================================== --- sys/mips/include/cpufunc.h (revision 212587) +++ sys/mips/include/cpufunc.h (working copy) @@ -272,7 +272,7 @@ uint32_t ostatus; ostatus = mips_rd_status(); - mask = (ostatus & ~MIPS_SR_INT_MASK) | (~mask & MIPS_SR_INT_MASK); + mask = (ostatus & ~MIPS_SR_INT_MASK) | (mask & MIPS_SR_INT_MASK); mips_wr_status(mask); return (ostatus); } Index: sys/mips/cavium/octeon_mp.c =================================================================== --- sys/mips/cavium/octeon_mp.c (revision 212587) +++ sys/mips/cavium/octeon_mp.c (working copy) @@ -96,7 +96,7 @@ */ clock_int_mask = hard_int_mask(5); ipi_int_mask = hard_int_mask(platform_ipi_intrnum()); - set_intr_mask(MIPS_SR_INT_MASK & ~(ipi_int_mask | clock_int_mask)); + set_intr_mask(ipi_int_mask | clock_int_mask); mips_wbflush(); } Index: sys/mips/mips/machdep.c =================================================================== --- sys/mips/mips/machdep.c (revision 212587) +++ sys/mips/mips/machdep.c (working copy) @@ -356,7 +356,7 @@ * Mask all interrupts. Each interrupt will be enabled * when handler is installed for it */ - set_intr_mask(MIPS_SR_INT_MASK); + set_intr_mask(0); /* Clear BEV in SR so we start handling our own exceptions */ mips_wr_status(mips_rd_status() & ~MIPS_SR_BEV); Index: sys/mips/mips/trap.c =================================================================== --- sys/mips/mips/trap.c (revision 212587) +++ sys/mips/mips/trap.c (working copy) @@ -304,7 +304,7 @@ * return to userland. */ if (trapframe->sr & MIPS_SR_INT_IE) { - set_intr_mask(~(trapframe->sr & MIPS_SR_INT_MASK)); + set_intr_mask(trapframe->sr & MIPS_SR_INT_MASK); intr_enable(); } else { intr_disable();