From owner-svn-src-head@FreeBSD.ORG Sun Mar 9 15:36:57 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 041F1D34; Sun, 9 Mar 2014 15:36:57 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id D86566C4; Sun, 9 Mar 2014 15:36:56 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s29Fau9f017904; Sun, 9 Mar 2014 15:36:56 GMT (envelope-from ian@svn.freebsd.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s29FauAM017902; Sun, 9 Mar 2014 15:36:56 GMT (envelope-from ian@svn.freebsd.org) Message-Id: <201403091536.s29FauAM017902@svn.freebsd.org> From: Ian Lepore Date: Sun, 9 Mar 2014 15:36:56 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r262950 - head/sys/arm/arm X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 09 Mar 2014 15:36:57 -0000 Author: ian Date: Sun Mar 9 15:36:56 2014 New Revision: 262950 URL: http://svnweb.freebsd.org/changeset/base/262950 Log: Make undefined exception entry MPSAFE. The old code used static storage to preserve a couple registers while setting up the trapframe for the main handler. Doing so was the last leftover crumbs from the days when a low-level debugger was hooked into the exception entry code. Now the exception entry sequence is essentially the same as for the other exceptions, which still involves needlessly indirecting through a function pointer which points to the same code on every platform. Removing that indirection will be handled as a separate cleanup. This work is based on an analysis by Juergen Weiss. Modified: head/sys/arm/arm/exception.S head/sys/arm/arm/undefined.c Modified: head/sys/arm/arm/exception.S ============================================================================== --- head/sys/arm/arm/exception.S Sun Mar 9 14:54:05 2014 (r262949) +++ head/sys/arm/arm/exception.S Sun Mar 9 15:36:56 2014 (r262950) @@ -218,46 +218,25 @@ END(exception_exit) * look like direct entry from the vector. */ ASENTRY_NP(undefined_entry) - stmfd sp!, {r0, r1} - ldr r0, Lundefined_handler_indirection - ldr r1, [sp], #0x0004 - str r1, [r0, #0x0000] - ldr r1, [sp], #0x0004 - str r1, [r0, #0x0004] - ldmia r0, {r0, r1, pc} - -Lundefined_handler_indirection: - .word Lundefined_handler_indirection_data + sub lr, lr, #0x00000004 /* Adjust the lr */ + PUSHFRAMEINSVC /* Push trap frame and switch */ + /* to SVC32 mode */ + ldr r1, Lundefined_handler_address + adr lr, exception_exit + mov r0, sp /* pass the stack pointer as r0 */ + ldr pc, [r1] END(undefined_entry) -/* - * assembly bounce code for calling the kernel - * undefined instruction handler. This uses - * a standard trap frame and is called in SVC mode. - */ - -ENTRY_NP(undefinedinstruction_bounce) - PUSHFRAMEINSVC +ASENTRY_NP(undefinedinstruction_bounce) + b undefinedinstruction +END(undefinedinstruction_bounce) - mov r0, sp - adr lr, exception_exit - b _C_LABEL(undefinedinstruction) +Lundefined_handler_address: + .word _C_LABEL(undefined_handler_address) .data - .align 0 - -/* - * Indirection data - * 2 words use for preserving r0 and r1 - * 3rd word contains the undefined handler address. - */ - -Lundefined_handler_indirection_data: - .word 0 - .word 0 - .global _C_LABEL(undefined_handler_address) _C_LABEL(undefined_handler_address): - .word _C_LABEL(undefinedinstruction_bounce) -END(undefinedinstruction_bounce) + .word undefinedinstruction_bounce + Modified: head/sys/arm/arm/undefined.c ============================================================================== --- head/sys/arm/arm/undefined.c Sun Mar 9 14:54:05 2014 (r262949) +++ head/sys/arm/arm/undefined.c Sun Mar 9 15:36:56 2014 (r262950) @@ -183,7 +183,6 @@ undefinedinstruction(struct trapframe *f if (!(frame->tf_spsr & I32_bit)) enable_interrupts(I32_bit|F32_bit); - frame->tf_pc -= INSN_SIZE; PCPU_INC(cnt.v_trap); fault_pc = frame->tf_pc;