From owner-freebsd-mobile@FreeBSD.ORG Tue Oct 3 17:33:09 2006 Return-Path: X-Original-To: freebsd-mobile@freebsd.org Delivered-To: freebsd-mobile@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id E1BAB16A416; Tue, 3 Oct 2006 17:33:09 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from server.baldwin.cx (66-23-211-162.clients.speedfactory.net [66.23.211.162]) by mx1.FreeBSD.org (Postfix) with ESMTP id EAA2343D45; Tue, 3 Oct 2006 17:33:08 +0000 (GMT) (envelope-from jhb@freebsd.org) Received: from localhost.corp.yahoo.com (john@localhost [127.0.0.1]) (authenticated bits=0) by server.baldwin.cx (8.13.6/8.13.6) with ESMTP id k93HWtOa027369; Tue, 3 Oct 2006 13:32:59 -0400 (EDT) (envelope-from jhb@freebsd.org) From: John Baldwin To: Nate Lawson Date: Tue, 3 Oct 2006 13:00:48 -0400 User-Agent: KMail/1.9.1 References: <20060921000628.GA1832@shorty.sorbonet.org> <200610021424.18562.jhb@freebsd.org> <45218C97.5050802@root.org> In-Reply-To: <45218C97.5050802@root.org> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200610031300.49509.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH authentication, not delayed by milter-greylist-2.0.2 (server.baldwin.cx [127.0.0.1]); Tue, 03 Oct 2006 13:33:00 -0400 (EDT) X-Virus-Scanned: ClamAV 0.88.3/1987/Tue Oct 3 11:45:09 2006 on server.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=-4.4 required=4.2 tests=ALL_TRUSTED,AWL,BAYES_00 autolearn=ham version=3.1.3 X-Spam-Checker-Version: SpamAssassin 3.1.3 (2006-06-01) on server.baldwin.cx Cc: freebsd-acpi@freebsd.org, Andrea Bittau , freebsd-mobile@freebsd.org Subject: Re: hack for getting suspend/resume to half work on an IBM Thinkpad x60s [SMP] X-BeenThere: freebsd-mobile@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Mobile computing with FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 03 Oct 2006 17:33:10 -0000 On Monday 02 October 2006 18:03, Nate Lawson wrote: > John Baldwin wrote: > > On Wednesday 20 September 2006 20:06, Andrea Bittau wrote: > >> This is a half working hack for getting suspend/resume to "work" on an IBM > >> > >> ... > >> > >> 2) apic. FreeBSD reconfigures the io apic upon resume, but not the local > > apic. > >> The patch attached to this mail fixes this. Indeed, it almost does so in > > the > >> "proper" way and not so much of a hack =D. > > > > I actually have made a full patch for APIC I think (thanks for your work as it > > reminded me about needing to resume lapic). You can find it at > > http://www.FreeBSD.org/~jhb/patches/apic_resume.patch It changes the x86 > > interrupt code to resume interrupt controllers, not interrupt sources. It > > then uses this to make sure the 8259A PICs are properly reset on resume as > > well as resuming the local APIC. Can you test this w/o SMP and make sure it > > works? > > Great to see this work going on. I just got a Core Duo laptop so this > would be great to see fixed. > > I'm kinda disappointed you're not using newbus for your device methods, > but I think I mentioned that before. I'll do that once we have multi-pass device probing, but for now we need to make sure interrupts are working before we start resuming other devices. > On the reset code, shouldn't there be some delays between writes to the > registers? > > + outb(IO_ICU1, ICW1_RESET | ICW1_IC4); > + outb(IO_ICU1 + ICU_IMR_OFFSET, IDT_IO_INTS); > [delay?] > + outb(IO_ICU1 + ICU_IMR_OFFSET, 1 << 2); > [delay?] > + outb(IO_ICU1 + ICU_IMR_OFFSET, ICW4_8086); > [delay?] > + outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff); > + outb(IO_ICU1, OCW3_SEL | OCW3_RR); > + > + outb(IO_ICU2, ICW1_RESET | ICW1_IC4); > + outb(IO_ICU2 + ICU_IMR_OFFSET, IDT_IO_INTS + 8); > [delay?] > + outb(IO_ICU2 + ICU_IMR_OFFSET, 2); > [delay?] > + outb(IO_ICU2 + ICU_IMR_OFFSET, ICW4_8086); > [delay?] > + outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff); > + outb(IO_ICU2, OCW3_SEL | OCW3_RR); Note that I just ripped this code out from amd64/amd64/machdep.c where there are no delays. -- John Baldwin