From owner-svn-src-head@freebsd.org Sun Jun 25 13:22:50 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 78403D9178B; Sun, 25 Jun 2017 13:22:50 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 487876EC8A; Sun, 25 Jun 2017 13:22:50 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v5PDMnJg019823; Sun, 25 Jun 2017 13:22:49 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v5PDMnmh019822; Sun, 25 Jun 2017 13:22:49 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201706251322.v5PDMnmh019822@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Sun, 25 Jun 2017 13:22:49 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r320328 - head/sys/arm64/arm64 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 25 Jun 2017 13:22:50 -0000 Author: andrew Date: Sun Jun 25 13:22:49 2017 New Revision: 320328 URL: https://svnweb.freebsd.org/changeset/base/320328 Log: Stop calling cpu_dcache_wb_range from PTE_SYNC. We set the shareability attributes in TCR_EL1 on boot. These tell the hardware the pagetables are in cached memory so there is no need to flush the entries from the cache to memory. This has about 4.2% improvement in system time and 2.7% improvement in user time for a buildkernel -j48 on a ThunderX. Keep the old code for now to allow for further comparisons. Modified: head/sys/arm64/arm64/pmap.c Modified: head/sys/arm64/arm64/pmap.c ============================================================================== --- head/sys/arm64/arm64/pmap.c Sun Jun 25 11:31:39 2017 (r320327) +++ head/sys/arm64/arm64/pmap.c Sun Jun 25 13:22:49 2017 (r320328) @@ -504,7 +504,11 @@ pmap_l3_valid(pt_entry_t l3) CTASSERT(L1_BLOCK == L2_BLOCK); +#if 0 #define PTE_SYNC(pte) cpu_dcache_wb_range((vm_offset_t)pte, sizeof(*pte)) +#else +#define PTE_SYNC(pte) (void)0 +#endif /* * Checks if the page is dirty. We currently lack proper tracking of this on