From owner-freebsd-arch Thu May 17 10:17: 5 2001 Delivered-To: freebsd-arch@freebsd.org Received: from wall.polstra.com (rtrwan160.accessone.com [206.213.115.74]) by hub.freebsd.org (Postfix) with ESMTP id 6311137B422 for ; Thu, 17 May 2001 10:17:01 -0700 (PDT) (envelope-from jdp@wall.polstra.com) Received: from vashon.polstra.com (vashon.polstra.com [206.213.73.13]) by wall.polstra.com (8.11.3/8.11.1) with ESMTP id f4HHGn013674; Thu, 17 May 2001 10:16:49 -0700 (PDT) (envelope-from jdp@wall.polstra.com) Received: (from jdp@localhost) by vashon.polstra.com (8.11.3/8.11.0) id f4HHGmg91136; Thu, 17 May 2001 10:16:48 -0700 (PDT) (envelope-from jdp) Date: Thu, 17 May 2001 10:16:48 -0700 (PDT) Message-Id: <200105171716.f4HHGmg91136@vashon.polstra.com> To: arch@freebsd.org From: John Polstra Cc: phk@critter.freebsd.dk Subject: Re: Gettimeofday Again... In-Reply-To: <9651.990081164@critter> References: <9651.990081164@critter> Organization: Polstra & Co., Seattle, WA Sender: owner-freebsd-arch@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.ORG In article <9651.990081164@critter>, Poul-Henning Kamp wrote: > In message <20010517025548.35895380E@overcee.netplex.com.au>, Peter Wemm writes > : > > >FYI: Pentium4 cpus have: > >Features=0x3febfbff > MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,,ACC> > > > >The last one is interesting. As I understand it, ACC ("Auto Clock > >Correction") allows for TSC correction in spite of varying cpu clocks. > > > >This is important because of the variable cpu speed throttling to keep the > >heat down. > > Hmm, anyone has any doc on that ? I'm not so sure ACC is the right label for it. I assume it's bit 29, since all the other flags print out in ascending bit order. The CPUID description in the P4 instruction set reference labels this bit "TM" and describes it as follows: Thermal Monitor. The processor implements the thermal monitor automatic thermal control circuitry (TCC). That is from 24547103.pdf which can be found at developer.intel.com among the P4 documents. A different volume in the same series, 24547203.pdf, says a little bit about this in section 12.14.4. They mention the "software controlled clock modulation facilities," but it all looks oriented toward controlling the temperature of the chip rather than compensating for somebody else's control over the clock rate. In section 12.14.6 they say: "The Performance Event monitoring architecture provides an event that counts the number of clock cycles that the processor clock has been modulated by the thermal monitor." However, at least the way I read the document, there are ways the clock can be slowed down by software which are not reflected in this performance counter. But don't take my word for it. I didn't study the docs very carefully. :-) John -- John Polstra jdp@polstra.com John D. Polstra & Co., Inc. Seattle, Washington USA "Disappointment is a good sign of basic intelligence." -- Chögyam Trungpa To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-arch" in the body of the message