Date: Tue, 20 Jun 2000 13:19:47 +0200 From: Stefan Esser <se@freebsd.org> To: Graham Wheeler <gram@cequrux.com> Cc: Olaf Hoyer <ohoyer@fbwi.fh-wilhelmshaven.de>, freebsd-hackers@FreeBSD.ORG, Stefan Esser <se@freebsd.org> Subject: Re: PCI Plug 'n' Pray and old BIOSes Message-ID: <20000620131947.A1150@StefanEsser.FreeBSD.org> In-Reply-To: <a97a100b2dcde23932f05f1e2214dba1@cequrux.com>; from gram@cequrux.com on Tue, Jun 20, 2000 at 10:41:14AM %2B0200 References: <4.1.20000620001700.00a487c0@mail.rz.fh-wilhelmshaven.de> <a97a100b2dcde23932f05f1e2214dba1@cequrux.com>
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On 2000-06-20 10:41 +0200, Graham Wheeler <gram@cequrux.com> wrote: > > Also the PCI latency is IMHO too high. > > Try setting it at around 40. > > That will affect the throughput of the NIC, or its reliability? Or both? It won't do anything, in your particular case. The latency timer is the maximum number of PCI bus-master cycles that this card will be granted, if some higher priority PCI device is requesting the bus. Your Ethernet card doesn't support bus-master transfers ... The latency timer has to be set to a value that prevents buffer under- / overflows in PCI devices with limited FIFO sizes. (For example a bus-master 10baseT Ethernet chip with just 16 bytes of buffer has a maximum latency of 16 microseconds or roughly 500 PCI clocks. If there are 5 possible bus-masters and priorities are round-robin, then each bus-master may occupy the bus for no longer than 100 clocks.) There are "minimum grant" and "maximum latency" registers in each PCI device, which hold constant values denoting the number of bus clocks the device requires for efficient operation and the maximum latency between requesting the bus and getting it granted the device can tolerate. Reagrds, STefan To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message
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