From owner-freebsd-hackers Mon Feb 5 04:49:58 1996 Return-Path: owner-hackers Received: (from root@localhost) by freefall.freebsd.org (8.7.3/8.7.3) id EAA24738 for hackers-outgoing; Mon, 5 Feb 1996 04:49:58 -0800 (PST) Received: from relay.hp.com (relay.hp.com [15.255.152.2]) by freefall.freebsd.org (8.7.3/8.7.3) with ESMTP id EAA24732 for ; Mon, 5 Feb 1996 04:49:57 -0800 (PST) Received: from fakir.india.hp.com by relay.hp.com with ESMTP (1.37.109.16/15.5+ECS 3.3) id AA299074496; Mon, 5 Feb 1996 04:48:21 -0800 Received: from localhost by fakir.india.hp.com with SMTP (1.37.109.16/15.5+ECS 3.3) id AA155974303; Mon, 5 Feb 1996 18:15:03 +0530 Message-Id: <199602051245.AA155974303@fakir.india.hp.com> To: gjennejohn@frt.dec.com Cc: hackers@freebsd.org Subject: Re: Willows In-Reply-To: Your message of "Mon, 05 Feb 1996 12:47:16 +0100." <9602051147.AA25141@cssmuc.frt.dec.com> Date: Mon, 05 Feb 1996 18:15:02 +0530 From: A JOSEPH KOSHY Sender: owner-hackers@freebsd.org Precedence: bulk gj> I didn't think of looking there. I think that the X server uses LDTs, I'm curious about this. Does the X server really need specific LDT support on FreeBSD? AFAIK we need access to the ioports on the machine (thus an IOPL change is in order) and mmaping of framebuffer memory on some of the cards (which is standard, taking care to make the FB non-cacheable). However there shouldn't be a need for anything more machine specific than that. On this topic; do we support the P5's 1MB page size? This could reduce the number of TLB misses when mmaping the video framebuffer (1-4MB typ) and when the CPU does typical drawing (bresenham lines get hit particularly by tlb stepping). Even the accelarators which use sparse addressing of their registers (Mach64, P9000, P9100 etc) this could be a win. Koshy