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From: Hans Petter Selasky <hselasky@FreeBSD.org>
Date: Mon, 7 Jul 2014 05:17:17 +0000 (UTC)
To: src-committers@freebsd.org, svn-src-all@freebsd.org,
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Subject: svn commit: r268354 - head/sys/dev/usb/controller
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Author: hselasky
Date: Mon Jul  7 05:17:16 2014
New Revision: 268354
URL: http://svnweb.freebsd.org/changeset/base/268354

Log:
  Improve support for Intel Lynx Point USB 3.0 controllers by masking
  the port routing bits like done in Linux.
  
  MFC after:	1 week
  Tested by:	Tur-Wei Chan <twchan@singnet.com.sg>

Modified:
  head/sys/dev/usb/controller/xhci_pci.c
  head/sys/dev/usb/controller/xhcireg.h

Modified: head/sys/dev/usb/controller/xhci_pci.c
==============================================================================
--- head/sys/dev/usb/controller/xhci_pci.c	Mon Jul  7 03:10:56 2014	(r268353)
+++ head/sys/dev/usb/controller/xhci_pci.c	Mon Jul  7 05:17:16 2014	(r268354)
@@ -157,6 +157,9 @@ xhci_pci_port_route(device_t self, uint3
 	temp |= set;
 	temp &= ~clear;
 
+	/* Don't set bits which the hardware doesn't support */
+	temp &= pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
+
 	pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4);
 	pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4);
 

Modified: head/sys/dev/usb/controller/xhcireg.h
==============================================================================
--- head/sys/dev/usb/controller/xhcireg.h	Mon Jul  7 03:10:56 2014	(r268353)
+++ head/sys/dev/usb/controller/xhcireg.h	Mon Jul  7 05:17:16 2014	(r268354)
@@ -35,7 +35,9 @@
 #define	PCI_XHCI_FLADJ		0x61	/* RW frame length adjust */
 
 #define	PCI_XHCI_INTEL_XUSB2PR	0xD0	/* Intel USB2 Port Routing */
+#define	PCI_XHCI_INTEL_USB2PRM	0xD4	/* Intel USB2 Port Routing Mask */
 #define	PCI_XHCI_INTEL_USB3_PSSEN 0xD8	/* Intel USB3 Port SuperSpeed Enable */
+#define	PCI_XHCI_INTEL_USB3PRM	0xDC	/* Intel USB3 Port Routing Mask */
 
 /* XHCI capability registers */
 #define	XHCI_CAPLENGTH		0x00	/* RO capability */