Date: Wed, 13 Jul 2005 12:38:52 -0700 From: Peter Wemm <peter@wemm.org> To: freebsd-amd64@freebsd.org Cc: Guy Dawson <guy@crossflight.co.uk>, freebsd-hardware@freebsd.org Subject: Re: AMD64 X2 Message-ID: <200507131238.52953.peter@wemm.org> In-Reply-To: <42C56EE5.3010608@speakeasy.net> References: <200506290818.j5T8IELL002348@peedub.jennejohn.org> <1d6d20bc050701065367a01e8b@mail.gmail.com> <42C56EE5.3010608@speakeasy.net>
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On Friday 01 July 2005 09:27 am, JM wrote: > Jia-Shiun Li wrote: > >On 7/1/05, Guy Dawson <guy@crossflight.co.uk> wrote: > >>David O'Brien wrote: > >>>It really should be that simple. All the external interfaces and > >>> pins are the same for Athlon64-939 and Athlon64 X2. They have > >>> the same thermal specifications, etc... > >> > >>It's the only way AMD could reasonably do it. To require a > >> different motherboard for X1 (?) and X2 chips would have the mobo > >> makers rioting! > > > >That's what Intel did. Requiring a new i945/i955-based board for > > their rushed dual-core CPUs. Only use the same socket but varied > > pin definition. If you put the new CPU on an i915 board, it will > > shutdown automatically to 'protect'. In contrast Athlon64 claimed > > to be designed with dual-core capability in mind from the > > beginning. > > > >Jia-Shiun. > >_______________________________________________ > >freebsd-hardware@freebsd.org mailing list > >http://lists.freebsd.org/mailman/listinfo/freebsd-hardware > >To unsubscribe, send any mail to > > "freebsd-hardware-unsubscribe@freebsd.org" > > first of all, Intel claims to have had the original idea of dual core > which any educated hardware expert knows to be false. AMD touted > support for multiple cores months ahead of intel and it's apparent by > the hyper transport technology white paper that AMD was planning this > route when the Athlon XP was released long ago. Intel only recently > scrapped their processor roadmap. rather than attempt to hit the > 4GHz mark they re-wrote the roadmap, fabbed up a quick and dirty dual > core solution and released it before AMD claiming that the idea was > theirs... i hate that company... Also, if you look at the original silicon specs, including the bios/kernel writers guide from the late 2001/early 2002 era, you'll see bit and register definitions for 'core 0' and 'core 1' on the sledgehammer^H^H^H^H^H^H^H^Hopteron/athlon64 docs. -- Peter Wemm - peter@wemm.org; peter@FreeBSD.org; peter@yahoo-inc.com "All of this is for nothing if we don't go to the stars" - JMS/B5
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