From owner-cvs-all@FreeBSD.ORG Fri Sep 16 18:20:50 2005 Return-Path: X-Original-To: cvs-all@FreeBSD.org Delivered-To: cvs-all@FreeBSD.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id E8E1E16A41F; Fri, 16 Sep 2005 18:20:49 +0000 (GMT) (envelope-from imp@bsdimp.com) Received: from harmony.bsdimp.com (vc4-2-0-87.dsl.netrack.net [199.45.160.85]) by mx1.FreeBSD.org (Postfix) with ESMTP id 79FEA43D45; Fri, 16 Sep 2005 18:20:49 +0000 (GMT) (envelope-from imp@bsdimp.com) Received: from localhost (localhost.village.org [127.0.0.1] (may be forged)) by harmony.bsdimp.com (8.13.3/8.13.3) with ESMTP id j8GIKKXw051857; Fri, 16 Sep 2005 12:20:20 -0600 (MDT) (envelope-from imp@bsdimp.com) Date: Fri, 16 Sep 2005 12:20:32 -0600 (MDT) Message-Id: <20050916.122032.85719690.imp@bsdimp.com> To: nate@root.org From: "M. Warner Losh" In-Reply-To: <432AFC3A.8000400@root.org> References: <200509160702.j8G72TBv063544@repoman.freebsd.org> <20050916.010746.98777894.imp@bsdimp.com> <432AFC3A.8000400@root.org> X-Mailer: Mew version 3.3 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=iso-2022-jp-2 Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-2.0 (harmony.bsdimp.com [127.0.0.1]); Fri, 16 Sep 2005 12:20:20 -0600 (MDT) Cc: cvs-src@FreeBSD.org, src-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: Re: cvs commit: src/sys/dev/acpica acpi_pcib_acpi.c src/sys/i386/pci pci_bus.c X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Sep 2005 18:20:50 -0000 In message: <432AFC3A.8000400@root.org> Nate Lawson writes: : M. Warner Losh wrote: : > In message: <200509160702.j8G72TBv063544@repoman.freebsd.org> : > Warner Losh writes: : > : imp 2005-09-16 07:02:29 UTC : > : : > : FreeBSD src repository : > : : > : Modified files: : > : sys/dev/acpica acpi_pcib_acpi.c : > : sys/i386/pci pci_bus.c : > : Log: : > : Commit a workaround to a problem with resource allocation. This helps : > : with some Dell servers that booted w/o a problem[*] on 5.4, but failed : > : with 6.0-BETA. : > : : > : On the PCI bus, when we do lazy resource allocation, we narrow the : > : range requested as we pass through bridges to reflect how the bridges : > : are programmed and what addresses they pass. However, when we're : > : doing an allocation on a bus that's directly connected to a host : > : bridge, no such translation can take place. We already had a fallback : > : range for memory requests, but none for ioports. As such, provide a : > : fallback for I/O ports so we don't allocate location 0, which will : > : have undesired side effects when the resources are actually used. : > : : > : This fixes a problem with booting a Dell server with usb in the : > : kernel. However, it is an unsatisfying solution. I don't like the : > : hard coded value, and I think we should start narrowing the resources : > : returned to not be in the so-called isa alias area (where the ranage & : > : 0x0300 must be 0 iirc). Doing such filtering will have to wait for : > : another day. : > : : > : This may be a good 6 candidate, maybe after its had a chance to be : > : refined. : > : : > : Tested by: glebius@ : > : > for those interested in the omitted footnote: : > : > [*] and also without its first usb controller: uhci0 failed to attach. : > : > I don't think this is worthy of a forced commit, but I know how some : > people are when they see dangling references... : : At some point, I may implement a similar workaround as Windows XP. It : blocks access by AML to the following port ranges. : : http://www.softwaretipsandtricks.com/forum/printthread.php?t=1674 : : Address Function Comments : 0x000 – 0x00F DMA Controller 1 : 0x020 – 0x021 PIC Access is never allowed* : 0x040 – 0x043 System Timer 1 : 0x048 – 0x04B Timer 2 Failsafe : 0x070 – 0x071 System CMOS, RTC : 0x074 – 0x076 Extended CMOS : 0x081 – 0x083 DMA1 Page Registers : 0x087 DMA1 CH0 Low Page : 0x089 DMA2 CH2 Low Page : 0x08A – 0x08B DMA2 CH3 Low Page, : 0x08F DMA2 Low Page Refresh : 0x090 – 0x091 Arbitration Control Port Card Select Feedback : 0x093 – 0x094 Reserved System Board Setup : 0x096 – 0x097 POS Channel Select : 0x0A0 – 0x0A1 Cascaded PIC Access is never allowed* : 0x0C0 – 0x0DF ISA DMA : 0x4D0 – 0x4D1 PIC Edge/Level CR Access is never allowed* : 0xCF8 – 0xD00 PCI Configuration Space : : *Read or write accesses to these ports are always blocked, regardless of : the BIOS use of the _OSI method. : : Of course, you're describing device resources, but it seems like a : similar issue. If someone else wants to do this, let me know. I've been thinking for a long time of having silent devices that gobble up these resources until such time that we have real devices. Most of it could be driven by PnP or ACPI info, I believe. The only one that couldn't be is the PCI Config space, but one change to pci.c would fix that :-). Warner