Date: Sat, 16 Dec 2000 20:20:39 -0800 (PST) From: Marc W <mwlist@akira.lanfear.com> To: freebsd-questions@freebsd.org Subject: Makefile Q Message-ID: <200012170420.UAA40710@akira.lanfear.com>
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Hello! Hope this an appropriate question for the list. I've got a Makefile and it's got the usual stuff in it, but there's one place where I can't quite find a way to make the rules generic. I have to run some header files through Trolltech's MOC, and then compile the output. So, my rules have to be like: OBJS=moc_widget.o moc_moo.o main.o .cc.o: $(CC) $(CFLAGS) etc ... moc_widget.cc: widget.h $(MOC) widget.h -o widget.cc moc_moo.cc: moo.h $(MOC) moo.h -o moo.cc This kinda sucks because for each header I add that needs to be preprocessed, I have to add a new target. Now, what I'd REALLY like is something like: OBJS=moc_widget.o moc_moo.o main.o .cc.o: $(CC) $(CFLAGS) etc ... moc_$(SOMETHING).cc: $(MOC) $(SOMETHING).h -o moc_$(SOMETHING).cc Any suggestions on how to do this or something similar? thanks! marc. To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-questions" in the body of the message
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