From owner-svn-src-all@FreeBSD.ORG Fri Mar 1 20:51:54 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.FreeBSD.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 7B7BD378; Fri, 1 Mar 2013 20:51:54 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 55B8A1774; Fri, 1 Mar 2013 20:51:54 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.5/8.14.5) with ESMTP id r21Kpskw087513; Fri, 1 Mar 2013 20:51:54 GMT (envelope-from marius@svn.freebsd.org) Received: (from marius@localhost) by svn.freebsd.org (8.14.5/8.14.5/Submit) id r21Kps4k087512; Fri, 1 Mar 2013 20:51:54 GMT (envelope-from marius@svn.freebsd.org) Message-Id: <201303012051.r21Kps4k087512@svn.freebsd.org> From: Marius Strobl Date: Fri, 1 Mar 2013 20:51:54 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r247579 - head/sys/dev/cas X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Mar 2013 20:51:54 -0000 Author: marius Date: Fri Mar 1 20:51:53 2013 New Revision: 247579 URL: http://svnweb.freebsd.org/changeset/base/247579 Log: - Move reporting of failures to disable RX/TX MAC under bootverbose as at least the Saturn chips of 501-6738 cards may fail to do so the first time, which isn't fatal though. Reported by: Paul Keusemann - Explain why we don't enable infinite bursts on sparc64. - Given that these chips support memory write invalidate, make sure that it's enabled in the command register. Also make sure that PERR# and SERR# assertion is enabled. MFC after: 1 week Modified: head/sys/dev/cas/if_cas.c Modified: head/sys/dev/cas/if_cas.c ============================================================================== --- head/sys/dev/cas/if_cas.c Fri Mar 1 20:49:56 2013 (r247578) +++ head/sys/dev/cas/if_cas.c Fri Mar 1 20:51:53 2013 (r247579) @@ -824,7 +824,8 @@ cas_disable_rx(struct cas_softc *sc) BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); if (cas_bitwait(sc, CAS_MAC_RX_CONF, CAS_MAC_RX_CONF_EN, 0)) return (1); - device_printf(sc->sc_dev, "cannot disable RX MAC\n"); + if (bootverbose) + device_printf(sc->sc_dev, "cannot disable RX MAC\n"); return (0); } @@ -838,7 +839,8 @@ cas_disable_tx(struct cas_softc *sc) BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); if (cas_bitwait(sc, CAS_MAC_TX_CONF, CAS_MAC_TX_CONF_EN, 0)) return (1); - device_printf(sc->sc_dev, "cannot disable TX MAC\n"); + if (bootverbose) + device_printf(sc->sc_dev, "cannot disable TX MAC\n"); return (0); } @@ -1041,7 +1043,8 @@ cas_init_locked(struct cas_softc *sc) /* * Enable infinite bursts for revisions without PCI issues if * applicable. Doing so greatly improves the TX performance on - * !__sparc64__. + * !__sparc64__ (on sparc64, setting CAS_INF_BURST improves TX + * performance only marginally but hurts RX throughput quite a bit). */ CAS_WRITE_4(sc, CAS_INF_BURST, #if !defined(__sparc64__) @@ -2691,7 +2694,10 @@ cas_pci_attach(device_t dev) return (ENXIO); } - pci_enable_busmaster(dev); + /* PCI configuration */ + pci_write_config(dev, PCIR_COMMAND, + pci_read_config(dev, PCIR_COMMAND, 2) | PCIM_CMD_BUSMASTEREN | + PCIM_CMD_MWRICEN | PCIM_CMD_PERRESPEN | PCIM_CMD_SERRESPEN, 2); sc->sc_dev = dev; if (sc->sc_variant == CAS_CAS && pci_get_devid(dev) < 0x02)