From owner-freebsd-current  Tue Jan 16 19:28: 2 2001
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Date: Wed, 17 Jan 2001 14:26:54 +1100
From: Peter Jeremy <peter.jeremy@alcatel.com.au>
Subject: Re: Atomic breakage?
In-reply-to: <20010116191009.E7240@fw.wintelcom.net>; from bright@wintelcom.net
 on Tue, Jan 16, 2001 at 07:10:10PM -0800
To: Alfred Perlstein <bright@wintelcom.net>
Cc: Bruce Evans <bde@zeta.org.au>,
	Julian Elischer <julian@elischer.org>,
	John Baldwin <jhb@FreeBSD.ORG>, current@FreeBSD.ORG,
	Mark Murray <mark@grondar.za>
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On 2001-Jan-16 19:10:10 -0800, Alfred Perlstein <bright@wintelcom.net> wrote:
>* Bruce Evans <bde@zeta.org.au> [010116 19:03] wrote:
>> These don't use atomic operations (hint: no 64-bit atomic operations are
>> implemented on i386's).  If they need to be atomic, then they must use
>> locks.
>
>Just wondering, can't you use 'LOCK addl' and then use 'LOCK addc'?
>add longword, add longword with carry?  I know it would be pretty
>ugly, but it should work, no?

It's not an atomic update because each longword is being updated
independently:  A reader can access the object between the low
word and high word being updated and see an inconsistent result.

If you don't need to support multiple bus masters, then the best you
can achieve is: "di; addl; adcl; ei" - you don't need the lock
prefixes.  To support multiple masters, you need proper locks.  Since
SMP isn't supported on the 80386, as long as you don't to DMA to/from
64-bit objects you can get away with the "di; addl; adcl; ei"
sequence.

Peter


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