From owner-svn-src-head@FreeBSD.ORG Tue Jul 17 14:03:05 2012 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 725BD106566B; Tue, 17 Jul 2012 14:03:05 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 43FF18FC17; Tue, 17 Jul 2012 14:03:05 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q6HE35ur060319; Tue, 17 Jul 2012 14:03:05 GMT (envelope-from mav@svn.freebsd.org) Received: (from mav@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q6HE35gi060316; Tue, 17 Jul 2012 14:03:05 GMT (envelope-from mav@svn.freebsd.org) Message-Id: <201207171403.q6HE35gi060316@svn.freebsd.org> From: Alexander Motin Date: Tue, 17 Jul 2012 14:03:05 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r238551 - head/sys/dev/usb/controller X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 Jul 2012 14:03:05 -0000 Author: mav Date: Tue Jul 17 14:03:04 2012 New Revision: 238551 URL: http://svn.freebsd.org/changeset/base/238551 Log: For Intel Panther/Lynx Point USB 3.0 xHCI controllers enable SuperSpeed USB capability and reroute USB 2.0 ports to the xHCI controller. Reviewed by: hselasky Modified: head/sys/dev/usb/controller/xhci_pci.c head/sys/dev/usb/controller/xhcireg.h Modified: head/sys/dev/usb/controller/xhci_pci.c ============================================================================== --- head/sys/dev/usb/controller/xhci_pci.c Tue Jul 17 13:03:47 2012 (r238550) +++ head/sys/dev/usb/controller/xhci_pci.c Tue Jul 17 14:03:04 2012 (r238551) @@ -101,6 +101,8 @@ xhci_pci_match(device_t self) case 0x1e318086: return ("Intel Panther Point USB 3.0 controller"); + case 0x8c318086: + return ("Intel Lynx Point USB 3.0 controller"); default: break; @@ -245,6 +247,7 @@ static int xhci_pci_take_controller(device_t self) { struct xhci_softc *sc = device_get_softc(self); + uint32_t device_id = pci_get_devid(self); uint32_t cparams; uint32_t eecp; uint32_t eec; @@ -285,5 +288,13 @@ xhci_pci_take_controller(device_t self) usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ } } + + /* On Intel chipsets reroute ports from EHCI to XHCI controller. */ + if (device_id == 0x1e318086 /* Panther Point */ || + device_id == 0x8c318086 /* Lynx Point */) { + pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 0xffffffff, 4); + pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, 0xffffffff, 4); + } + return (0); } Modified: head/sys/dev/usb/controller/xhcireg.h ============================================================================== --- head/sys/dev/usb/controller/xhcireg.h Tue Jul 17 13:03:47 2012 (r238550) +++ head/sys/dev/usb/controller/xhcireg.h Tue Jul 17 14:03:04 2012 (r238551) @@ -34,6 +34,9 @@ #define PCI_USB_REV_3_0 0x30 /* USB 3.0 */ #define PCI_XHCI_FLADJ 0x61 /* RW frame length adjust */ +#define PCI_XHCI_INTEL_XUSB2PR 0xD0 /* Intel USB2 Port Routing */ +#define PCI_XHCI_INTEL_USB3_PSSEN 0xD8 /* Intel USB3 Port SuperSpeed Enable */ + /* XHCI capability registers */ #define XHCI_CAPLENGTH 0x00 /* RO capability */ #define XHCI_RESERVED 0x01 /* Reserved */