From owner-freebsd-arch Thu Jun 20 3:44:24 2002 Delivered-To: freebsd-arch@freebsd.org Received: from rina.r.dl.itc.u-tokyo.ac.jp (rina.r.dl.itc.u-tokyo.ac.jp [133.11.199.247]) by hub.freebsd.org (Postfix) with ESMTP id 6239037B400 for ; Thu, 20 Jun 2002 03:44:20 -0700 (PDT) Received: from rina.r.dl.itc.u-tokyo.ac.jp (localhost [127.0.0.1]) by rina.r.dl.itc.u-tokyo.ac.jp (8.12.3+3.5Wbeta/3.7W-rina.r-Nankai-Koya) with ESMTP id g5KAiJ3i032356 ; Thu, 20 Jun 2002 19:44:19 +0900 (JST) Message-Id: <200206201044.g5KAiJ3i032356@rina.r.dl.itc.u-tokyo.ac.jp> Date: Thu, 20 Jun 2002 19:44:18 +0900 From: Seigo Tanimura To: Seigo Tanimura Cc: arch@FreeBSD.org Subject: Re: multiple threads for interrupts In-Reply-To: <200206201035.g5KAZ53i029301@rina.r.dl.itc.u-tokyo.ac.jp> References: <200206201035.g5KAZ53i029301@rina.r.dl.itc.u-tokyo.ac.jp> User-Agent: Wanderlust/2.8.1 (Something) SEMI/1.14.3 (Ushinoya) FLIM/1.14.3 (=?ISO-8859-1?Q?Unebigory=F2mae?=) APEL/10.3 MULE XEmacs/21.1 (patch 14) (Cuyahoga Valley) (i386--freebsd) Organization: Digital Library Research Division, Information Techinology Centre, The University of Tokyo MIME-Version: 1.0 (generated by SEMI 1.14.3 - "Ushinoya") Content-Type: text/plain; charset=US-ASCII Sender: owner-freebsd-arch@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.ORG On Thu, 20 Jun 2002 19:35:05 +0900, Seigo Tanimura said: tanimura> At the moment, each interrupt type (hardware and swi) has only one tanimura> kernel thread to handle interrupts. This can be a potential tanimura> bottleneck in an SMP host because virtually only up to one processor tanimura> can handle interrupts. tanimura> One solution is to run multiple threads for each of the interrupt tanimura> types. Since I noticed this issue first during my work of network tanimura> locking, I have been tweaking the swi subsystem so that it runs tanimura> multiple threads for an swi type. For those who are interested, the tanimura> patch can be found at: tanimura> http://people.FreeBSD.org/~tanimura/patches/swipool.diff.gz With this patch, the system runs as many kernel threads as the number of CPUs for each swi types: naho% dmesg | grep SMP FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs naho% ps axuwwg | grep swi root 13 0.0 0.0 0 3 ?? WL 1Jan70 3:08.71 (swi1: net) root 14 0.0 0.0 0 3 ?? WL 1Jan70 3:05.91 (swi1: net) root 15 0.1 0.0 0 3 ?? WL 1Jan70 6:37.67 (swi6: tty:sio clock) root 16 0.0 0.0 0 3 ?? WL 1Jan70 5:56.67 (swi6: tty:sio clock) root 17 0.0 0.0 0 3 ?? WL 1Jan70 0:00.00 (swi4: vm) root 18 0.0 0.0 0 3 ?? WL 1Jan70 0:00.00 (swi4: vm) root 20 0.0 0.0 0 3 ?? WL 1Jan70 0:00.00 (swi2: camnet) root 21 0.0 0.0 0 3 ?? WL 1Jan70 0:00.00 (swi2: camnet) root 22 0.0 0.0 0 3 ?? WL 1Jan70 0:00.25 (swi3: cambio) root 23 0.0 0.0 0 3 ?? WL 1Jan70 0:00.00 (swi3: cambio) root 24 0.0 0.0 0 3 ?? WL 1Jan70 0:00.00 (swi5: task queue) root 25 0.0 0.0 0 3 ?? WL 1Jan70 0:00.00 (swi5: task queue) root 30 0.0 0.0 0 3 ?? WL 1Jan70 0:00.00 (swi0: tty:sio) root 31 0.0 0.0 0 3 ?? WL 1Jan70 0:00.00 (swi0: tty:sio) tanimura 47144 0.0 0.1 308 46 p1 M+ 7:38PM 0:00.00 grep swi The number of CPUs is chosen for the number of kernel threads per an swi type because it is the maximum possible number of threads runnable in parallel. It gives us nothing but contention to run more threads. tanimura> While I worked on only swis, hardware interrupts should suffer from tanimura> the same issue as well. Thus it would be better to tweak the general tanimura> interrupt mechanism rather than only the swi subsystem. I will see tanimura> how that works in the next few days. tanimura> Comments and flames are welcome. Thanks a lot. -- Seigo Tanimura To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-arch" in the body of the message