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From: John Baldwin <jhb@FreeBSD.org>
Date: Mon, 18 May 2009 19:33:59 +0000 (UTC)
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Subject: svn commit: r192331 - in head/sys: amd64/include i386/include
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Author: jhb
Date: Mon May 18 19:33:59 2009
New Revision: 192331
URL: http://svn.freebsd.org/changeset/base/192331

Log:
  Bump CACHE_LINE_SIZE to 128 for x86.  Intel's manuals explicitly recommend
  using 128 byte alignment for locks.  (See IA-32 SDM Vol 3A 7.11.6.7)

Modified:
  head/sys/amd64/include/param.h
  head/sys/i386/include/param.h

Modified: head/sys/amd64/include/param.h
==============================================================================
--- head/sys/amd64/include/param.h	Mon May 18 19:26:25 2009	(r192330)
+++ head/sys/amd64/include/param.h	Mon May 18 19:33:59 2009	(r192331)
@@ -93,7 +93,7 @@
  * CACHE_LINE_SIZE is the compile-time maximum cache line size for an
  * architecture.  It should be used with appropriate caution.
  */
-#define	CACHE_LINE_SHIFT	6
+#define	CACHE_LINE_SHIFT	7
 #define	CACHE_LINE_SIZE		(1 << CACHE_LINE_SHIFT)
 
 /* Size of the level 1 page table units */

Modified: head/sys/i386/include/param.h
==============================================================================
--- head/sys/i386/include/param.h	Mon May 18 19:26:25 2009	(r192330)
+++ head/sys/i386/include/param.h	Mon May 18 19:33:59 2009	(r192331)
@@ -78,7 +78,7 @@
  * CACHE_LINE_SIZE is the compile-time maximum cache line size for an
  * architecture.  It should be used with appropriate caution.
  */
-#define	CACHE_LINE_SHIFT	6
+#define	CACHE_LINE_SHIFT	7
 #define	CACHE_LINE_SIZE		(1 << CACHE_LINE_SHIFT)
 
 #define PAGE_SHIFT	12		/* LOG2(PAGE_SIZE) */