From owner-svn-src-stable@freebsd.org Thu Jun 7 09:03:44 2018 Return-Path: Delivered-To: svn-src-stable@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7FB0BFDC4CA; Thu, 7 Jun 2018 09:03:44 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 336B0867ED; Thu, 7 Jun 2018 09:03:44 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 158921E12D; Thu, 7 Jun 2018 09:03:44 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w5793hQE001302; Thu, 7 Jun 2018 09:03:43 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w5793gBF001296; Thu, 7 Jun 2018 09:03:42 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201806070903.w5793gBF001296@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Thu, 7 Jun 2018 09:03:42 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r334771 - in stable/11: lib/msun/amd64 lib/msun/i387 lib/msun/tests lib/msun/x86 sys/amd64/include sys/i386/include X-SVN-Group: stable-11 X-SVN-Commit-Author: dim X-SVN-Commit-Paths: in stable/11: lib/msun/amd64 lib/msun/i387 lib/msun/tests lib/msun/x86 sys/amd64/include sys/i386/include X-SVN-Commit-Revision: 334771 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Jun 2018 09:03:44 -0000 Author: dim Date: Thu Jun 7 09:03:42 2018 New Revision: 334771 URL: https://svnweb.freebsd.org/changeset/base/334771 Log: MFC r334445: Resolve conflicts between macros in fenv.h and ieeefp.h This is a follow-up to r321483, which disabled -Wmacro-redefined for some lib/msun tests. If an application included both fenv.h and ieeefp.h, several macros such as __fldcw(), __fldenv() were defined in both headers, with slightly different arguments, leading to conflicts. Fix this by putting all the common macros in the machine-specific versions of ieeefp.h. Where needed, update the arguments in places where the macros are invoked. This also slightly reduces the differences between the amd64 and i386 versions of ieeefp.h. Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D15633 Modified: stable/11/lib/msun/amd64/fenv.c stable/11/lib/msun/i387/fenv.c stable/11/lib/msun/tests/Makefile stable/11/lib/msun/x86/fenv.h stable/11/sys/amd64/include/ieeefp.h stable/11/sys/i386/include/ieeefp.h Directory Properties: stable/11/ (props changed) Modified: stable/11/lib/msun/amd64/fenv.c ============================================================================== --- stable/11/lib/msun/amd64/fenv.c Thu Jun 7 07:49:18 2018 (r334770) +++ stable/11/lib/msun/amd64/fenv.c Thu Jun 7 09:03:42 2018 (r334771) @@ -58,12 +58,12 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) __fnstenv(&env.__x87); env.__x87.__status &= ~excepts; env.__x87.__status |= *flagp & excepts; - __fldenv(env.__x87); + __fldenv(&env.__x87); __stmxcsr(&env.__mxcsr); env.__mxcsr &= ~excepts; env.__mxcsr |= *flagp & excepts; - __ldmxcsr(env.__mxcsr); + __ldmxcsr(&env.__mxcsr); return (0); } @@ -92,7 +92,7 @@ fegetenv(fenv_t *envp) * fnstenv masks all exceptions, so we need to restore the * control word to avoid this side effect. */ - __fldcw(envp->__x87.__control); + __fldcw(&envp->__x87.__control); return (0); } @@ -107,7 +107,7 @@ feholdexcept(fenv_t *envp) envp->__mxcsr = mxcsr; mxcsr &= ~FE_ALL_EXCEPT; mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT; - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); return (0); } @@ -137,9 +137,9 @@ __feenableexcept(int mask) __stmxcsr(&mxcsr); omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; control &= ~mask; - __fldcw(control); + __fldcw(&control); mxcsr &= ~(mask << _SSE_EMASK_SHIFT); - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); return (omask); } @@ -154,9 +154,9 @@ __fedisableexcept(int mask) __stmxcsr(&mxcsr); omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; control |= mask; - __fldcw(control); + __fldcw(&control); mxcsr |= mask << _SSE_EMASK_SHIFT; - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); return (omask); } Modified: stable/11/lib/msun/i387/fenv.c ============================================================================== --- stable/11/lib/msun/i387/fenv.c Thu Jun 7 07:49:18 2018 (r334770) +++ stable/11/lib/msun/i387/fenv.c Thu Jun 7 09:03:42 2018 (r334771) @@ -101,13 +101,13 @@ fesetexceptflag(const fexcept_t *flagp, int excepts) __fnstenv(&env); env.__status &= ~excepts; env.__status |= *flagp & excepts; - __fldenv(env); + __fldenv(&env); if (__HAS_SSE()) { __stmxcsr(&mxcsr); mxcsr &= ~excepts; mxcsr |= *flagp & excepts; - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); } return (0); @@ -137,7 +137,7 @@ fegetenv(fenv_t *envp) * fnstenv masks all exceptions, so we need to restore * the old control word to avoid this side effect. */ - __fldcw(envp->__control); + __fldcw(&envp->__control); if (__HAS_SSE()) { __stmxcsr(&mxcsr); __set_mxcsr(*envp, mxcsr); @@ -157,7 +157,7 @@ feholdexcept(fenv_t *envp) __set_mxcsr(*envp, mxcsr); mxcsr &= ~FE_ALL_EXCEPT; mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT; - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); } return (0); } @@ -194,10 +194,10 @@ __feenableexcept(int mask) mxcsr = 0; omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; control &= ~mask; - __fldcw(control); + __fldcw(&control); if (__HAS_SSE()) { mxcsr &= ~(mask << _SSE_EMASK_SHIFT); - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); } return (omask); } @@ -216,10 +216,10 @@ __fedisableexcept(int mask) mxcsr = 0; omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; control |= mask; - __fldcw(control); + __fldcw(&control); if (__HAS_SSE()) { mxcsr |= mask << _SSE_EMASK_SHIFT; - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); } return (omask); } Modified: stable/11/lib/msun/tests/Makefile ============================================================================== --- stable/11/lib/msun/tests/Makefile Thu Jun 7 07:49:18 2018 (r334770) +++ stable/11/lib/msun/tests/Makefile Thu Jun 7 09:03:42 2018 (r334771) @@ -84,10 +84,6 @@ SRCS.ilogb2_test= ilogb_test.c LIBADD+= m -.if ${MACHINE_CPUARCH} == "i386" -# XXX: __fldcw macro mismatch between fenv.h and ieeefp.h . -CWARNFLAGS.clang+= -Wno-error=macro-redefined -.endif WARNS?= 1 # Copied from lib/msun/Makefile Modified: stable/11/lib/msun/x86/fenv.h ============================================================================== --- stable/11/lib/msun/x86/fenv.h Thu Jun 7 07:49:18 2018 (r334770) +++ stable/11/lib/msun/x86/fenv.h Thu Jun 7 09:03:42 2018 (r334771) @@ -31,6 +31,7 @@ #include #include +#include #ifndef __fenv_static #define __fenv_static static @@ -95,18 +96,10 @@ __BEGIN_DECLS extern const fenv_t __fe_dfl_env; #define FE_DFL_ENV (&__fe_dfl_env) -#define __fldcw(__cw) __asm __volatile("fldcw %0" : : "m" (__cw)) -#define __fldenv(__env) __asm __volatile("fldenv %0" : : "m" (__env)) #define __fldenvx(__env) __asm __volatile("fldenv %0" : : "m" (__env) \ : "st", "st(1)", "st(2)", "st(3)", "st(4)", \ "st(5)", "st(6)", "st(7)") -#define __fnclex() __asm __volatile("fnclex") -#define __fnstenv(__env) __asm __volatile("fnstenv %0" : "=m" (*(__env))) -#define __fnstcw(__cw) __asm __volatile("fnstcw %0" : "=m" (*(__cw))) -#define __fnstsw(__sw) __asm __volatile("fnstsw %0" : "=am" (*(__sw))) #define __fwait() __asm __volatile("fwait") -#define __ldmxcsr(__csr) __asm __volatile("ldmxcsr %0" : : "m" (__csr)) -#define __stmxcsr(__csr) __asm __volatile("stmxcsr %0" : "=m" (*(__csr))) int fegetenv(fenv_t *__envp); int feholdexcept(fenv_t *__envp); @@ -181,12 +174,12 @@ feclearexcept(int __excepts) } else { __fnstenv(&__env); __env.__status &= ~__excepts; - __fldenv(__env); + __fldenv(&__env); } if (__HAS_SSE()) { __stmxcsr(&__mxcsr); __mxcsr &= ~__excepts; - __ldmxcsr(__mxcsr); + __ldmxcsr(&__mxcsr); } return (0); } @@ -232,13 +225,13 @@ fesetround(int __round) __fnstcw(&__control); __control &= ~_ROUND_MASK; __control |= __round; - __fldcw(__control); + __fldcw(&__control); if (__HAS_SSE()) { __stmxcsr(&__mxcsr); __mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT); __mxcsr |= __round << _SSE_ROUND_SHIFT; - __ldmxcsr(__mxcsr); + __ldmxcsr(&__mxcsr); } return (0); @@ -262,7 +255,7 @@ fesetenv(const fenv_t *__envp) */ __fldenvx(__env); if (__HAS_SSE()) - __ldmxcsr(__mxcsr); + __ldmxcsr(&__mxcsr); return (0); } @@ -278,11 +271,11 @@ feclearexcept(int __excepts) } else { __fnstenv(&__env.__x87); __env.__x87.__status &= ~__excepts; - __fldenv(__env.__x87); + __fldenv(&__env.__x87); } __stmxcsr(&__env.__mxcsr); __env.__mxcsr &= ~__excepts; - __ldmxcsr(__env.__mxcsr); + __ldmxcsr(&__env.__mxcsr); return (0); } @@ -321,12 +314,12 @@ fesetround(int __round) __fnstcw(&__control); __control &= ~_ROUND_MASK; __control |= __round; - __fldcw(__control); + __fldcw(&__control); __stmxcsr(&__mxcsr); __mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT); __mxcsr |= __round << _SSE_ROUND_SHIFT; - __ldmxcsr(__mxcsr); + __ldmxcsr(&__mxcsr); return (0); } @@ -344,7 +337,7 @@ fesetenv(const fenv_t *__envp) * inlined, so we need to be more careful. */ __fldenvx(__envp->__x87); - __ldmxcsr(__envp->__mxcsr); + __ldmxcsr(&__envp->__mxcsr); return (0); } Modified: stable/11/sys/amd64/include/ieeefp.h ============================================================================== --- stable/11/sys/amd64/include/ieeefp.h Thu Jun 7 07:49:18 2018 (r334770) +++ stable/11/sys/amd64/include/ieeefp.h Thu Jun 7 09:03:42 2018 (r334771) @@ -128,6 +128,7 @@ typedef enum { #define __fldcw(addr) __asm __volatile("fldcw %0" : : "m" (*(addr))) #define __fldenv(addr) __asm __volatile("fldenv %0" : : "m" (*(addr))) +#define __fnclex() __asm __volatile("fnclex") #define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr))) #define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr))) #define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr))) Modified: stable/11/sys/i386/include/ieeefp.h ============================================================================== --- stable/11/sys/i386/include/ieeefp.h Thu Jun 7 07:49:18 2018 (r334770) +++ stable/11/sys/i386/include/ieeefp.h Thu Jun 7 09:03:42 2018 (r334771) @@ -114,6 +114,8 @@ typedef enum { #define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr))) #define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr))) #define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr))) +#define __ldmxcsr(addr) __asm __volatile("ldmxcsr %0" : : "m" (*(addr))) +#define __stmxcsr(addr) __asm __volatile("stmxcsr %0" : "=m" (*(addr))) /* * Load the control word. Be careful not to trap if there is a currently