Date: Fri, 8 Jun 2012 21:26:20 GMT From: Brooks Davis <brooks@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 212493 for review Message-ID: <201206082126.q58LQKoW068181@skunkworks.freebsd.org>
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http://p4web.freebsd.org/@@212493?ac=10 Change 212493 by brooks@brooks_ecr_current on 2012/06/08 21:25:43 Enable isf(4) and disable /dev/de4flash. Update the geom_map partition table to refect the current state of discussions. Affected files ... .. //depot/projects/ctsrd/beribsd/src/sys/mips/conf/BERI_DE4.hints#4 edit Differences ... ==== //depot/projects/ctsrd/beribsd/src/sys/mips/conf/BERI_DE4.hints#4 (text+ko) ==== @@ -34,65 +34,51 @@ # # Expose the DE4 flash via an Avalon "generic" device. +# This is incompatible with the isf(4) driver. # -hint.altera_avgen.0.at="nexus0" -hint.altera_avgen.0.maddr=0x74000000 -hint.altera_avgen.0.msize=0x4000000 -hint.altera_avgen.0.width=2 -hint.altera_avgen.0.fileio="rw" -hint.altera_avgen.0.mmapio="rwx" -hint.altera_avgen.0.devname="de4flash" +#hint.altera_avgen.0.at="nexus0" +#hint.altera_avgen.0.maddr=0x74000000 +#hint.altera_avgen.0.msize=0x4000000 +#hint.altera_avgen.0.width=2 +#hint.altera_avgen.0.fileio="rw" +#hint.altera_avgen.0.mmapio="rwx" +#hint.altera_avgen.0.devname="de4flash" # # General Intel StrataFlash driver # -# To enable this you must disable the altera_avgen de4flash mapping. -# -#hint.isf.0.at="nexus0" -#hint.isf.0.maddr=0x74000000 -#hint.isf.0.msize=0x2000000 -#hint.isf.1.at="nexus0" -#hint.isf.1.maddr=0x76000000 -#hint.isf.1.msize=0x2000000 +hint.isf.0.at="nexus0" +hint.isf.0.maddr=0x74000000 +hint.isf.0.msize=0x2000000 +hint.isf.1.at="nexus0" +hint.isf.1.maddr=0x76000000 +hint.isf.1.msize=0x2000000 -# Spare bits at the beginning of the first chip (128K) +# Reserved configuration blocks. Don't touch. hint.map.0.at="isf0" hint.map.0.start=0x00000000 hint.map.0.end=0x00020000 -hint.map.0.name="isf0p0" -#hint.map.0.readonly=1 +hint.map.0.name="config" +hint.map.0.readonly=1 -# Hardwired location of default bitfile +# Hardwired location of bitfile hint.map.1.at="isf0" hint.map.1.start=0x00020000 -hint.map.1.end=0x01820000 +hint.map.1.end=0x01000000 +# Actual value from DE4 Getting Started Guide +#hint.map.1.end=0x01820000 hint.map.1.name="fpga" -#hint.map.1.readonly=1 -# Spare bits at the end of the first chip +# Kernel on first chip hint.map.2.at="isf0" -hint.map.2.start=0x01820000 +hint.map.2.start=0x01000000 +# Actual value from DE4 Getting Started Guide +#hint.map.2.start=0x01820000 hint.map.2.end=0x02000000 -hint.map.2.name="isf0p1" -#hint.map.2.readonly=1 +hint.map.2.name="kernel" -# First half of the second chip (16MB) +# The second chip hint.map.3.at="isf1" hint.map.3.start=0x00000000 -hint.map.3.end=0x01000000 -hint.map.3.name="isf1p0" -#hint.map.3.readonly=1 - -# CTSRD specific location of kernel (8MB) -hint.map.4.at="isf1" -hint.map.4.start=0x01000000 -hint.map.4.end=0x01800000 -hint.map.4.name="kernel" -#hint.map.4.readonly=1 - -# Extra space on the second chip (8MB) -hint.map.5.at="isf1" -hint.map.5.start=0x01800000 -hint.map.5.end=0x02000000 -hint.map.5.name="isf1p1" -#hint.map.5.readonly=1 +hint.map.3.end=0x02000000 +hint.map.3.name="root"
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