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Date:      Thu, 20 Jun 2002 09:12:59 -0400
From:      Bosko Milekic <bmilekic@unixdaemons.com>
To:        Seigo Tanimura <tanimura@r.dl.itc.u-tokyo.ac.jp>
Cc:        arch@FreeBSD.ORG
Subject:   Re: multiple threads for interrupts
Message-ID:  <20020620091259.A21509@unixdaemons.com>
In-Reply-To: <200206201035.g5KAZ53i029301@rina.r.dl.itc.u-tokyo.ac.jp>; from tanimura@r.dl.itc.u-tokyo.ac.jp on Thu, Jun 20, 2002 at 07:35:05PM %2B0900
References:  <200206201035.g5KAZ53i029301@rina.r.dl.itc.u-tokyo.ac.jp>

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On Thu, Jun 20, 2002 at 07:35:05PM +0900, Seigo Tanimura wrote:
> At the moment, each interrupt type (hardware and swi) has only one
> kernel thread to handle interrupts.  This can be a potential
> bottleneck in an SMP host because virtually only up to one processor
> can handle interrupts.
> 
> One solution is to run multiple threads for each of the interrupt
> types.  Since I noticed this issue first during my work of network
> locking, I have been tweaking the swi subsystem so that it runs
> multiple threads for an swi type.  For those who are interested, the
> patch can be found at:
> 
> http://people.FreeBSD.org/~tanimura/patches/swipool.diff.gz

  This looks very interesting.  However, I'm unsure as to whether
  spinning off another thread as opposed to just setting the need bit
  and letting the original thread re-service is actually a better idea.

  It would be interesting to keep this code around and see what happens
  with performance.  Perhaps we will observe that it is only better in
  the software interrupt case, or vice-versa.

> While I worked on only swis, hardware interrupts should suffer from
> the same issue as well.  Thus it would be better to tweak the general
> interrupt mechanism rather than only the swi subsystem.  I will see
> how that works in the next few days.
> 
> Comments and flames are welcome.  Thanks a lot.
> 
> -- 
> Seigo Tanimura <tanimura@r.dl.itc.u-tokyo.ac.jp> <tanimura@FreeBSD.org>

Regards,
-- 
Bosko Milekic
bmilekic@unixdaemons.com
bmilekic@FreeBSD.org


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