From owner-freebsd-stable@FreeBSD.ORG Wed Mar 2 03:02:20 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D8CAF106564A for ; Wed, 2 Mar 2011 03:02:20 +0000 (UTC) (envelope-from jdc@koitsu.dyndns.org) Received: from qmta12.westchester.pa.mail.comcast.net (qmta12.westchester.pa.mail.comcast.net [76.96.59.227]) by mx1.freebsd.org (Postfix) with ESMTP id 83EEC8FC17 for ; Wed, 2 Mar 2011 03:02:20 +0000 (UTC) Received: from omta21.westchester.pa.mail.comcast.net ([76.96.62.72]) by qmta12.westchester.pa.mail.comcast.net with comcast id E2wH1g00E1ZXKqc5C32Lzc; Wed, 02 Mar 2011 03:02:20 +0000 Received: from koitsu.dyndns.org ([98.248.33.18]) by omta21.westchester.pa.mail.comcast.net with comcast id E3261g0170PUQVN3h32FHu; Wed, 02 Mar 2011 03:02:18 +0000 Received: by icarus.home.lan (Postfix, from userid 1000) id 809AD9B422; Tue, 1 Mar 2011 19:02:05 -0800 (PST) Date: Tue, 1 Mar 2011 19:02:05 -0800 From: Jeremy Chadwick To: Mike Tancsa Message-ID: <20110302030205.GA51668@icarus.home.lan> References: <4D6DA259.4050307@sentex.net> <20110302020412.GA50962@icarus.home.lan> <4D6DAC5A.6080904@sentex.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4D6DAC5A.6080904@sentex.net> User-Agent: Mutt/1.5.21 (2010-09-15) Cc: FreeBSD-STABLE Mailing List , John Baldwin Subject: Re: CPU0: local APIC error 0x40 CPU1: local APIC error 0x40 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 Mar 2011 03:02:20 -0000 On Tue, Mar 01, 2011 at 09:32:58PM -0500, Mike Tancsa wrote: > On 3/1/2011 9:04 PM, Jeremy Chadwick wrote: > > On Tue, Mar 01, 2011 at 08:50:17PM -0500, Mike Tancsa wrote: > >> I had a machine deadlock just now and the only thing on the serial > >> console was > >> > >> CPU0: local APIC error 0x40 > >> CPU1: local APIC error 0x40 > > > > The error in question I'm not familiar with, but the code in > > src/sys/x86/x86/local_apic.c indicates that 0x40 is the contents of the > > LAPIC ESR (error status register). > > > > Please provide full output from a verbose boot. > > Attached as a .txt file Thanks -- this will probably be helpful to other folks, not so much me. :-) I lack familiarity with I/O and local APIC configuration. The error strings in question aren't shown in the attached text file, strangely enough. Maybe only visible on VGA console? Based on what I can find in Intel specifications, bit 6 (0x40) of the ESR is defined as: Bit 6: Receive Illegal Vector Set when the local APIC detects an illegal vector (one in the range 0 to 15) in an interrupt message it receives or in an interrupt generated locally from the local vector table or via a self IPI. Such interrupts are not be delivered to the processor; the local APIC will never set an IRR bit in the range 0 to 15. I got this from Section 10.5.3 of Intel's IA-32 Intel Architecture Software Developer's Manual, Volume 3A: http://developer.intel.com/design/processor/manuals/253668.pdf The motherboard looks like a Supermicro X7SBA or something along those lines (I can tell from the ACPI string). A workaround might be to disable multiprocessor support in the BIOS (specifically Advanced -> Advanced Processor Options -> Core-Multi-Processing = Disabled). If this does work, note that I agree it's not an acceptable permanent solution. CC'ing John who might have some ideas about the LAPIC stuff. -- | Jeremy Chadwick jdc@parodius.com | | Parodius Networking http://www.parodius.com/ | | UNIX Systems Administrator Mountain View, CA, USA | | Making life hard for others since 1977. PGP 4BD6C0CB |