From owner-svn-src-all@freebsd.org Sat Nov 14 00:04:43 2015 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 8AB8AA2E7EB; Sat, 14 Nov 2015 00:04:43 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 3CE37123F; Sat, 14 Nov 2015 00:04:43 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id tAE04gBT078653; Sat, 14 Nov 2015 00:04:42 GMT (envelope-from jhb@FreeBSD.org) Received: (from jhb@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id tAE04gJu078651; Sat, 14 Nov 2015 00:04:42 GMT (envelope-from jhb@FreeBSD.org) Message-Id: <201511140004.tAE04gJu078651@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhb set sender to jhb@FreeBSD.org using -f From: John Baldwin Date: Sat, 14 Nov 2015 00:04:42 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org Subject: svn commit: r290808 - stable/9/sys/dev/pci X-SVN-Group: stable-9 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 14 Nov 2015 00:04:43 -0000 Author: jhb Date: Sat Nov 14 00:04:42 2015 New Revision: 290808 URL: https://svnweb.freebsd.org/changeset/base/290808 Log: MFC 232472 (partial): Cache the starting location of the PCI-express capability for PCI-express devices in PCI device ivars. Modified: stable/9/sys/dev/pci/pci.c stable/9/sys/dev/pci/pcivar.h Modified: stable/9/sys/dev/pci/pci.c ============================================================================== --- stable/9/sys/dev/pci/pci.c Fri Nov 13 23:47:41 2015 (r290807) +++ stable/9/sys/dev/pci/pci.c Sat Nov 14 00:04:42 2015 (r290808) @@ -798,6 +798,9 @@ pci_read_cap(device_t pcib, pcicfgregs * * at least one PCI-express device. */ pcie_chipset = 1; + cfg->pcie.pcie_location = ptr; + val = REG(ptr + PCIR_EXPRESS_FLAGS, 2); + cfg->pcie.pcie_type = val & PCIM_EXP_FLAGS_TYPE; break; default: break; @@ -1776,10 +1779,12 @@ pci_ht_map_msi(device_t dev, uint64_t ad int pci_get_max_read_req(device_t dev) { + struct pci_devinfo *dinfo = device_get_ivars(dev); int cap; uint16_t val; - if (pci_find_cap(dev, PCIY_EXPRESS, &cap) != 0) + cap = dinfo->cfg.pcie.pcie_location; + if (cap == 0) return (0); val = pci_read_config(dev, cap + PCIER_DEVICE_CTL, 2); val &= PCIEM_CTL_MAX_READ_REQUEST; @@ -1790,10 +1795,12 @@ pci_get_max_read_req(device_t dev) int pci_set_max_read_req(device_t dev, int size) { + struct pci_devinfo *dinfo = device_get_ivars(dev); int cap; uint16_t val; - if (pci_find_cap(dev, PCIY_EXPRESS, &cap) != 0) + cap = dinfo->cfg.pcie.pcie_location; + if (cap == 0) return (0); if (size < 128) size = 128; Modified: stable/9/sys/dev/pci/pcivar.h ============================================================================== --- stable/9/sys/dev/pci/pcivar.h Fri Nov 13 23:47:41 2015 (r290807) +++ stable/9/sys/dev/pci/pcivar.h Sat Nov 14 00:04:42 2015 (r290808) @@ -124,6 +124,12 @@ struct pcicfg_ht { uint64_t ht_msiaddr; /* MSI mapping base address */ }; +/* Interesting values for PCI-express */ +struct pcicfg_pcie { + uint8_t pcie_location; /* Offset of PCI-e capability registers. */ + uint8_t pcie_type; /* Device type. */ +}; + /* config header information common to all header types */ typedef struct pcicfg { struct device *dev; /* device which owns this */ @@ -165,6 +171,7 @@ typedef struct pcicfg { struct pcicfg_msi msi; /* PCI MSI */ struct pcicfg_msix msix; /* PCI MSI-X */ struct pcicfg_ht ht; /* HyperTransport */ + struct pcicfg_pcie pcie; /* PCI Express */ } pcicfgregs; /* additional type 1 device config header information (PCI to PCI bridge) */