From owner-svn-src-all@FreeBSD.ORG Wed Jan 4 22:55:17 2012 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9AE0C106566B; Wed, 4 Jan 2012 22:55:15 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 8854A8FC16; Wed, 4 Jan 2012 22:55:15 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q04MtFmN000570; Wed, 4 Jan 2012 22:55:15 GMT (envelope-from yongari@svn.freebsd.org) Received: (from yongari@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q04MtFY0000567; Wed, 4 Jan 2012 22:55:15 GMT (envelope-from yongari@svn.freebsd.org) Message-Id: <201201042255.q04MtFY0000567@svn.freebsd.org> From: Pyun YongHyeon Date: Wed, 4 Jan 2012 22:55:15 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org X-SVN-Group: stable-8 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r229530 - in stable/8/sys: dev/re pci X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Jan 2012 22:55:17 -0000 Author: yongari Date: Wed Jan 4 22:55:15 2012 New Revision: 229530 URL: http://svn.freebsd.org/changeset/base/229530 Log: MFC r227587,227590-227591,227593,227638-227639: r227587: Add preliminary support for RTL8402 PCIe FastEthernet with integrated card reader. r227590: Add preliminary support for RTL8411 PCIe Gigabit ethernet with integrated card reader. r227591: Add missing driver lock in SIOCSIFCAP handler. r227593: Disable PCIe ASPM (Active State Power Management) for all controllers. More and more RealTek controllers started to implement EEE feature. Vendor driver seems to load a kind of firmware for EEE with additional PHY fixups. It is known that the EEE feature may need ASPM support. Unfortunately there is no documentation for EEE of the controller so enabling ASPM may cause more problems. r227638: Add preliminary support for second generation RTL8105E PCIe FastEthernet. r227639: Add preliminary support for RTL8168/8111F PCIe Gigabit ethernet. Modified: stable/8/sys/dev/re/if_re.c stable/8/sys/pci/if_rlreg.h Directory Properties: stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/pf/ (props changed) Modified: stable/8/sys/dev/re/if_re.c ============================================================================== --- stable/8/sys/dev/re/if_re.c Wed Jan 4 22:53:18 2012 (r229529) +++ stable/8/sys/dev/re/if_re.c Wed Jan 4 22:55:15 2012 (r229530) @@ -181,7 +181,7 @@ static struct rl_type re_devs[] = { { RT_VENDORID, RT_DEVICEID_8101E, 0, "RealTek 810xE PCIe 10/100baseTX" }, { RT_VENDORID, RT_DEVICEID_8168, 0, - "RealTek 8168/8111 B/C/CP/D/DP/E PCIe Gigabit Ethernet" }, + "RealTek 8168/8111 B/C/CP/D/DP/E/F PCIe Gigabit Ethernet" }, { RT_VENDORID, RT_DEVICEID_8169, 0, "RealTek 8169/8169S/8169SB(L)/8110S/8110SB(L) Gigabit Ethernet" }, { RT_VENDORID, RT_DEVICEID_8169SC, 0, @@ -220,7 +220,9 @@ static struct rl_hwrev re_hwrevs[] = { { RL_HWREV_8102EL_SPIN1, RL_8169, "8102EL", RL_MTU }, { RL_HWREV_8103E, RL_8169, "8103E", RL_MTU }, { RL_HWREV_8401E, RL_8169, "8401E", RL_MTU }, + { RL_HWREV_8402, RL_8169, "8402", RL_MTU }, { RL_HWREV_8105E, RL_8169, "8105E", RL_MTU }, + { RL_HWREV_8105E_SPIN1, RL_8169, "8105E", RL_MTU }, { RL_HWREV_8168B_SPIN2, RL_8169, "8168", RL_JUMBO_MTU }, { RL_HWREV_8168B_SPIN3, RL_8169, "8168", RL_JUMBO_MTU }, { RL_HWREV_8168C, RL_8169, "8168C/8111C", RL_JUMBO_MTU_6K }, @@ -230,6 +232,8 @@ static struct rl_hwrev re_hwrevs[] = { { RL_HWREV_8168DP, RL_8169, "8168DP/8111DP", RL_JUMBO_MTU_9K }, { RL_HWREV_8168E, RL_8169, "8168E/8111E", RL_JUMBO_MTU_9K}, { RL_HWREV_8168E_VL, RL_8169, "8168E/8111E-VL", RL_JUMBO_MTU_6K}, + { RL_HWREV_8168F, RL_8169, "8168F/8111F", RL_JUMBO_MTU_9K}, + { RL_HWREV_8411, RL_8169, "8411", RL_JUMBO_MTU_9K}, { 0, 0, NULL, 0 } }; @@ -1184,6 +1188,7 @@ re_attach(device_t dev) struct rl_softc *sc; struct ifnet *ifp; struct rl_hwrev *hw_rev; + u_int32_t cap, ctl; int hwrev; u_int16_t devid, re_did = 0; int error = 0, i, phy, rid; @@ -1239,8 +1244,10 @@ re_attach(device_t dev) msic = pci_msi_count(dev); msixc = pci_msix_count(dev); - if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) + if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) { sc->rl_flags |= RL_FLAG_PCIE; + sc->rl_expcap = reg; + } if (bootverbose) { device_printf(dev, "MSI count : %d\n", msic); device_printf(dev, "MSI-X count : %d\n", msixc); @@ -1332,6 +1339,23 @@ re_attach(device_t dev) CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF); } + /* Disable ASPM L0S/L1. */ + if (sc->rl_expcap != 0) { + cap = pci_read_config(dev, sc->rl_expcap + + PCIR_EXPRESS_LINK_CAP, 2); + if ((cap & PCIM_LINK_CAP_ASPM) != 0) { + ctl = pci_read_config(dev, sc->rl_expcap + + PCIR_EXPRESS_LINK_CTL, 2); + if ((ctl & 0x0003) != 0) { + ctl &= ~0x0003; + pci_write_config(dev, sc->rl_expcap + + PCIR_EXPRESS_LINK_CTL, ctl, 2); + device_printf(dev, "ASPM disabled\n"); + } + } else + device_printf(dev, "no ASPM capability\n"); + } + hw_rev = re_hwrevs; hwrev = CSR_READ_4(sc, RL_TXCFG); switch (hwrev & 0x70000000) { @@ -1381,7 +1405,9 @@ re_attach(device_t dev) RL_FLAG_AUTOPAD | RL_FLAG_MACSLEEP; break; case RL_HWREV_8401E: + case RL_HWREV_8402: case RL_HWREV_8105E: + case RL_HWREV_8105E_SPIN1: sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PHYWAKE_PM | RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_FASTETHER | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD; @@ -1413,6 +1439,8 @@ re_attach(device_t dev) RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2; break; case RL_HWREV_8168E_VL: + case RL_HWREV_8168F: + case RL_HWREV_8411: sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2; @@ -3308,6 +3336,7 @@ re_ioctl(struct ifnet *ifp, u_long comma } } #endif /* DEVICE_POLLING */ + RL_LOCK(sc); if ((mask & IFCAP_TXCSUM) != 0 && (ifp->if_capabilities & IFCAP_TXCSUM) != 0) { ifp->if_capenable ^= IFCAP_TXCSUM; @@ -3366,8 +3395,9 @@ re_ioctl(struct ifnet *ifp, u_long comma } if (reinit && ifp->if_drv_flags & IFF_DRV_RUNNING) { ifp->if_drv_flags &= ~IFF_DRV_RUNNING; - re_init(sc); + re_init_locked(sc); } + RL_UNLOCK(sc); VLAN_CAPABILITIES(ifp); } break; Modified: stable/8/sys/pci/if_rlreg.h ============================================================================== --- stable/8/sys/pci/if_rlreg.h Wed Jan 4 22:53:18 2012 (r229529) +++ stable/8/sys/pci/if_rlreg.h Wed Jan 4 22:55:15 2012 (r229530) @@ -178,6 +178,10 @@ #define RL_HWREV_8168C_SPIN2 0x3C400000 #define RL_HWREV_8168CP 0x3C800000 #define RL_HWREV_8105E 0x40800000 +#define RL_HWREV_8105E_SPIN1 0x40C00000 +#define RL_HWREV_8402 0x44000000 +#define RL_HWREV_8168F 0x48000000 +#define RL_HWREV_8411 0x48800000 #define RL_HWREV_8139 0x60000000 #define RL_HWREV_8139A 0x70000000 #define RL_HWREV_8139AG 0x70800000 @@ -866,6 +870,7 @@ struct rl_softc { const struct rl_hwrev *rl_hwrev; int rl_eecmd_read; int rl_eewidth; + int rl_expcap; int rl_txthresh; struct rl_chain_data rl_cdata; struct rl_list_data rl_ldata;