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Date:      Wed, 22 Sep 1999 10:25:27 -0500 (CDT)
From:      Jim Bryant <jbryant@argus.tfs.net>
To:        green@FreeBSD.ORG (Brian F. Feldman)
Cc:        freebsd-current@FreeBSD.ORG
Subject:   Re: Testers please!
Message-ID:  <199909221525.KAA28026@argus.tfs.net>
In-Reply-To: <Pine.BSF.4.10.9909212306120.10399-100000@janus.syracuse.net> from "Brian F. Feldman" at "Sep 21, 99 11:13:36 pm"

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In reply:
> On Tue, 21 Sep 1999, Luoqi Chen wrote:
> 
> > This reminds me about the usage of TSC counter on SMP. First even though
> > we don't use TSC for time keeping on SMP, the TSC frequency from calibration
> > is still valid (at least for BSP), and we can show it in the cpu identification
> > message. Second, the listed reason for not using TSC on SMP is the inability
> > to synchronize TSCs on all cpus. My question is, is it really necessary?
> > TSC is initialized to 0 at hardware reset, which should happen to all CPUs
> > at the same time (invalid assumption?), in another words, all TSCs should be
> > automatically synchronized.
> 
> ISTRT something I did long ago was kill the TSC reset FreeBSD did, so
> there should be no reason that they won't be all at the same place.  I
> am willing to bet half my farm that the biggest problem was that we
> did that, and barring that we could have always done SMP using the TSC.
> 
> One question comes to mind: is there a way that the TSCs could become
> desynchronized somehow?  Even though all CPUs run at the same frequency,
> isn't there a strong possibility for slight frequency deviation since
> we use crystal oscillation instead of a more accurate atomic breakdown
> for regulation, or am I just smoking crack?

time for rehab, dude.

since there is only a single master clock oscillator, there really
should be no frequency difference between CPUs.  There is the a phase
difference caused by differences in conductor lengths between the
master clock and the CPUs, but this difference is fixed by the length
of the conductor and the laws of physics.  Granted, all crystals have
drift over time and temperature, but this drift should be identical
for all CPUs on the same clock bus.  Ideally, motherboards should be
designed to have equal length clock lines to each CPU, thus
eliminating this phase difference, especially with multiple selectable
clock speeds which would change the wavelength, and thus the phase
difference if the lines are of differing lengths.

the current price of accurate TCXOs is low enough to be economical in
PCs, and these seriously reduce the drift compared to the cheezy TTL
clocks currently used.

speaking of atomic breakdown...  they could start making cheaper
cesium-beam tubes given the current level of the nuclear waste issue
if they felt like it, provided some kind of untamperable enclosure can
be built [30 year half life, biologically behaves like potassium and
goes straight for the muscle, 200 day biological half-time].  let's
not bury nuclear waste, let's put it to use IN PCs!  even then, such a
clock would only act as a reference filter to correct a running
oscillator.  Cesium beam tubes are essentially extremely accurate
narrow bandwidth filters, and not oscillators.

with russia having made two seperate threats of aggression to destroy
the entire planet with nuclear weapons in the past twelve months [MAD
is still a policy, they launch, everybody launches], GPS/GOES is not a
good idea for clock synchronization.  an EMP pulse would take the sats
out, but then many computers would be zapped at the same time anyhow,
thus making this a moot point for anything that is plugged in at the
time or has cables attached at the time.  [this is not intended to be
a political statement, nor am i bashing common russians, this is just
a reality check].

jim
-- 
All opinions expressed are mine, if you    |  "I will not be pushed, stamped,
think otherwise, then go jump into turbid  |  briefed, debriefed, indexed, or
radioactive waters and yell WAHOO !!!      |  numbered!" - #1, "The Prisoner"
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