From owner-svn-src-head@freebsd.org Sun Feb 26 22:05:24 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 4570FCEE3EC; Sun, 26 Feb 2017 22:05:24 +0000 (UTC) (envelope-from jchandra@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id F078B833; Sun, 26 Feb 2017 22:05:23 +0000 (UTC) (envelope-from jchandra@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1QM5N1g028098; Sun, 26 Feb 2017 22:05:23 GMT (envelope-from jchandra@FreeBSD.org) Received: (from jchandra@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1QM5N4V028097; Sun, 26 Feb 2017 22:05:23 GMT (envelope-from jchandra@FreeBSD.org) Message-Id: <201702262205.v1QM5N4V028097@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jchandra set sender to jchandra@FreeBSD.org using -f From: "Jayachandran C." Date: Sun, 26 Feb 2017 22:05:23 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r314318 - head/sys/dev/uart X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 26 Feb 2017 22:05:24 -0000 Author: jchandra Date: Sun Feb 26 22:05:22 2017 New Revision: 314318 URL: https://svnweb.freebsd.org/changeset/base/314318 Log: Enable pl011 UART FIFOs The pl011 UART has a 16 entry Tx FIFO and a 16 entry Rx FIFO that have not been used so far. Update the driver to enable the FIFOs and use them in transmit and receive. Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D8819 Modified: head/sys/dev/uart/uart_dev_pl011.c Modified: head/sys/dev/uart/uart_dev_pl011.c ============================================================================== --- head/sys/dev/uart/uart_dev_pl011.c Sun Feb 26 21:33:18 2017 (r314317) +++ head/sys/dev/uart/uart_dev_pl011.c Sun Feb 26 22:05:22 2017 (r314318) @@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$"); #define DR_OE (1 << 11) /* Overrun error */ #define UART_FR 0x06 /* Flag register */ +#define FR_RXFE (1 << 4) /* Receive FIFO/reg empty */ #define FR_TXFF (1 << 5) /* Transmit FIFO/reg full */ #define FR_RXFF (1 << 6) /* Receive FIFO/reg full */ #define FR_TXFE (1 << 7) /* Transmit FIFO/reg empty */ @@ -171,9 +172,9 @@ uart_pl011_param(struct uart_bas *bas, i line |= LCR_H_PEN; else line &= ~LCR_H_PEN; + line |= LCR_H_FEN; /* Configure the rest */ - line &= ~LCR_H_FEN; ctrl |= (CR_RXE | CR_TXE | CR_UARTEN); if (bas->rclk != 0 && baudrate != 0) { @@ -219,7 +220,7 @@ static int uart_pl011_rxready(struct uart_bas *bas) { - return (__uart_getreg(bas, UART_FR) & FR_RXFF); + return !(__uart_getreg(bas, UART_FR) & FR_RXFE); } static int @@ -417,8 +418,8 @@ uart_pl011_bus_probe(struct uart_softc * device_set_desc(sc->sc_dev, "PrimeCell UART (PL011)"); - sc->sc_rxfifosz = 1; - sc->sc_txfifosz = 1; + sc->sc_rxfifosz = 16; + sc->sc_txfifosz = 16; return (0); } @@ -440,7 +441,6 @@ uart_pl011_bus_receive(struct uart_softc break; } - __uart_setreg(bas, UART_ICR, (UART_RXREADY | RIS_RTIM)); xc = __uart_getreg(bas, UART_DR); rx = xc & 0xff; @@ -481,20 +481,12 @@ uart_pl011_bus_transmit(struct uart_soft uart_barrier(bas); } - /* If not empty wait until it is */ - if ((__uart_getreg(bas, UART_FR) & FR_TXFE) != FR_TXFE) { - sc->sc_txbusy = 1; - - /* Enable TX interrupt */ - __uart_setreg(bas, UART_IMSC, psc->imsc); - } + /* Mark busy and enable TX interrupt */ + sc->sc_txbusy = 1; + __uart_setreg(bas, UART_IMSC, psc->imsc); uart_unlock(sc->sc_hwmtx); - /* No interrupt expected, schedule the next fifo write */ - if (!sc->sc_txbusy) - uart_sched_softih(sc, SER_INT_TXIDLE); - return (0); }