Date: Fri, 16 Dec 2005 12:27:17 -0700 From: Scott Long <scottl@samsco.org> To: Eric Anholt <eta@lclark.edu> Cc: "O. Hartmann" <ohartman@mail.uni-mainz.de>, freebsd-amd64@freebsd.org, Jung-uk Kim <jkim@freebsd.org> Subject: Re: device drm with PCIe? Message-ID: <43A31515.6050602@samsco.org> In-Reply-To: <1134760995.1404.88.camel@leguin> References: <43A1636A.6030108@mail.uni-mainz.de> <200512161230.41499.jkim@FreeBSD.org> <1134757662.1404.81.camel@leguin> <200512161358.34963.jkim@FreeBSD.org> <1134760995.1404.88.camel@leguin>
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Eric Anholt wrote: > On Fri, 2005-12-16 at 13:58 -0500, Jung-uk Kim wrote: > >>On Friday 16 December 2005 01:27 pm, Eric Anholt wrote: >> >>>On Fri, 2005-12-16 at 12:30 -0500, Jung-uk Kim wrote: >>> >>>>On Thursday 15 December 2005 07:36 am, O. Hartmann wrote: >>>> >>>>>Normally 'device drm' is only useable in conjunction with >>>>>'device agp'. A lot of amd64 based boxes now use PEG slots for >>>>>their graphics accelerators. Is it possible to utilize 'drm' >>>>>with PCIe devices? >>>> >>>>Yes. It should work, at least in theory. ;-) >>>> >>>> >>>>>Does device agp has any effect on PCIe graphics accelerators? >>>> >>>>No. You don't need it for PCI-Express controller. >>> >>>Now, this is stuff I don't 100% understand, but what I've figured >>>out so far is that for graphics, you're going to need a GART >>>somewhere. For their PCIE cards, ATI deals with this by doing >>>essentially the old PCIGART method but tweaked, in lieu of AGP. >>>Intel's PCIE graphics, on the other hand, has a GART on their chips >>>that is basically the same thing as their previous AGP GARTs, at >>>least in terms of programming. So we expose their gart through the >>>agp device still, even though the chipset may be PCIE. >> >>Ah, Eric is correct about the Intel part. But it was amd64 thread, so >>I just assumed... :-( > > > And now, for extra complication, we've got EM64Ts on i915 > motherboards :) > > It also seems to me like we ought to be able to use the internal GART on > real amd64s to avoid the card's PCIGART-ish method for PCIE radeons, > right? > Apparently there is a bit of magic with true AMD athlon64 and Opteron systems regarding the different ways that GART functionality is exposed. Probably the best bet is to get with David O'brien and figure out those details. For Intel systems, it depends on whether the AGP GART has a link to the PCIe root complex. I can't imagine it not having this, but again it's something to check the docs for. Scott
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