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From: Olivier Houchard <cognet@FreeBSD.org>
To: Perforce Change Reviews <perforce@freebsd.org>
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Subject: PERFORCE change 109308 for review
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http://perforce.freebsd.org/chv.cgi?CH=109308

Change 109308 by cognet@cognet on 2006/11/05 23:10:09

	Disable the instruction and data caches before attempting to reset the
	cpu.

Affected files ...

.. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425.c#14 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425.c#14 (text+ko) ====

@@ -47,6 +47,8 @@
 #include <machine/bus.h>
 #include <machine/intr.h>
 
+#include <vm/vm.h>
+#include <vm/pmap.h>
 #include <arm/xscale/ixp425/ixp425reg.h>
 #include <arm/xscale/ixp425/ixp425var.h>
 #include <arm/xscale/ixp425/ixp425_intr.h>
@@ -180,6 +182,10 @@
         bus_space_write_4(&ixp425_bs_tag, IXP425_EXP_VBASE,
 	    EXP_CNFG0_OFFSET, reg);
 	cpu_idcache_wbinv_all();
+	cpu_control(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE 
+	    | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
+	    , 0xffffffff);
+										
 	/* Jump into the bootcode's reset vector. */
 	__asm __volatile(
 	    "mrc p15, 0, %0, c1, c0, 0\n"