From owner-freebsd-current@FreeBSD.ORG Mon May 22 18:55:45 2006 Return-Path: X-Original-To: current@freebsd.org Delivered-To: freebsd-current@FreeBSD.ORG Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id A9FB916AAAE for ; Mon, 22 May 2006 18:55:45 +0000 (UTC) (envelope-from chad@shire.net) Received: from hobbiton.shire.net (mail.shire.net [166.70.252.250]) by mx1.FreeBSD.org (Postfix) with ESMTP id 6248143D46 for ; Mon, 22 May 2006 18:55:45 +0000 (GMT) (envelope-from chad@shire.net) Received: from [67.171.127.191] (helo=[192.168.99.68]) by hobbiton.shire.net with esmtpa (Exim 4.51) id 1FiFZA-000KJD-Om; Mon, 22 May 2006 12:55:44 -0600 In-Reply-To: <4471E7FB.3090400@centtech.com> References: <1e4841eb0605211854i44c4aa4cm9dfc72506c2232ea@mail.gmail.com> <4471E7FB.3090400@centtech.com> Mime-Version: 1.0 (Apple Message framework v750) Content-Type: text/plain; charset=US-ASCII; delsp=yes; format=flowed Message-Id: Content-Transfer-Encoding: 7bit From: "Chad Leigh -- Shire.Net LLC" Date: Mon, 22 May 2006 12:55:43 -0600 To: Eric Anderson X-Mailer: Apple Mail (2.750) X-SA-Exim-Connect-IP: 67.171.127.191 X-SA-Exim-Mail-From: chad@shire.net X-SA-Exim-Scanned: No (on hobbiton.shire.net); SAEximRunCond expanded to false Cc: current@freebsd.org, m m Subject: Re: FreeBSD is now self-hosting on the UltraSPARC T1 X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 May 2006 18:55:49 -0000 On May 22, 2006, at 10:34 AM, Eric Anderson wrote: > Chad Leigh -- Shire.Net LLC wrote: >> On May 21, 2006, at 7:54 PM, m m wrote: >>> While >>> on topic, the Opterons aren't SMP either, and neither are the >>> ht-Xeons... >> I would like t\o hear the rational for the Opterons (presumably >> the dual core ones) not being SMP. They have two independent >> operating cores in one physical package. Who cares how it is >> packaged? I would tend to agree with you on the ht-Xeon in terms >> of general descriptions. I do not know as well how the ht-xeon >> work as I don't use any but it seems to me that the "SMP" moniker, >> at least in FreeBSD, relate to how things are scheduled. >> Btw, Opteron MB with a single dual-core ship get a BIOS report on >> Boot of having 2 CPUs... > > Careful - two cores doesn't mean two caches, and isn't always just > 'two cores glued into one package'. > But on the Opteron, the subject of the discussion, it does. They have two caches. The Intel Core Duo dies not. Chad > ------------------------------------------------------------------- --- Chad Leigh -- Shire.Net LLC Your Web App and Email hosting provider chad at shire.net