From owner-svn-src-head@FreeBSD.ORG Sun Nov 17 02:03:37 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 83DC27F6; Sun, 17 Nov 2013 02:03:37 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 72F5E20CD; Sun, 17 Nov 2013 02:03:37 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id rAH23blh070907; Sun, 17 Nov 2013 02:03:37 GMT (envelope-from nwhitehorn@svn.freebsd.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id rAH23aZI070904; Sun, 17 Nov 2013 02:03:36 GMT (envelope-from nwhitehorn@svn.freebsd.org) Message-Id: <201311170203.rAH23aZI070904@svn.freebsd.org> From: Nathan Whitehorn Date: Sun, 17 Nov 2013 02:03:36 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r258244 - in head/sys/powerpc: booke mpc85xx X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 17 Nov 2013 02:03:37 -0000 Author: nwhitehorn Date: Sun Nov 17 02:03:36 2013 New Revision: 258244 URL: http://svnweb.freebsd.org/changeset/base/258244 Log: Move CCSR discovery into the platform module, while simultaneously making it more flexible about how the CCSR range is found. With this change, the stock MPC85XX will boot on a Routerboard 800. Hardware donated by: Benjamin Perrault Modified: head/sys/powerpc/booke/machdep.c head/sys/powerpc/mpc85xx/mpc85xx.h head/sys/powerpc/mpc85xx/platform_mpc85xx.c Modified: head/sys/powerpc/booke/machdep.c ============================================================================== --- head/sys/powerpc/booke/machdep.c Sun Nov 17 01:59:42 2013 (r258243) +++ head/sys/powerpc/booke/machdep.c Sun Nov 17 02:03:36 2013 (r258244) @@ -387,14 +387,6 @@ booke_init(uint32_t arg1, uint32_t arg2) /* Reset TLB1 to get rid of temporary mappings */ tlb1_init(); - /* Set up IMMR */ - if (fdt_immr_addr(0) == 0) { - fdt_immr_va = pmap_early_io_map(fdt_immr_pa, fdt_immr_size); - } else { - printf("Warning: SOC base registers could not be found!\n"); - fdt_immr_va = 0; - } - /* Reset Time Base */ mttb(0); Modified: head/sys/powerpc/mpc85xx/mpc85xx.h ============================================================================== --- head/sys/powerpc/mpc85xx/mpc85xx.h Sun Nov 17 01:59:42 2013 (r258243) +++ head/sys/powerpc/mpc85xx/mpc85xx.h Sun Nov 17 02:03:36 2013 (r258244) @@ -33,7 +33,8 @@ /* * Configuration control and status registers */ -#define CCSRBAR_VA fdt_immr_va +extern vm_offset_t ccsrbar_va; +#define CCSRBAR_VA ccsrbar_va #define OCP85XX_CCSRBAR (CCSRBAR_VA + 0x0) #define OCP85XX_BPTR (CCSRBAR_VA + 0x20) Modified: head/sys/powerpc/mpc85xx/platform_mpc85xx.c ============================================================================== --- head/sys/powerpc/mpc85xx/platform_mpc85xx.c Sun Nov 17 01:59:42 2013 (r258243) +++ head/sys/powerpc/mpc85xx/platform_mpc85xx.c Sun Nov 17 02:03:36 2013 (r258244) @@ -49,6 +49,9 @@ __FBSDID("$FreeBSD$"); #include #include +#include +#include + #include #include "platform_if.h" @@ -63,6 +66,7 @@ extern uint32_t bp_tlb1_end[]; #endif extern uint32_t *bootinfo; +vm_offset_t ccsrbar_va; static int cpu, maxcpu; @@ -116,8 +120,12 @@ mpc85xx_probe(platform_t plat) static int mpc85xx_attach(platform_t plat) { - phandle_t cpus, child; + phandle_t cpus, child, ccsr; + const char *soc_name_guesses[] = {"/soc", "soc", NULL}; + const char **name; + pcell_t ranges[6], acells, pacells, scells; uint32_t sr; + uint64_t ccsrbar, ccsrsize; int i, law_max, tgt; if ((cpus = OF_finddevice("/cpus")) != -1) { @@ -128,6 +136,51 @@ mpc85xx_attach(platform_t plat) maxcpu = 1; /* + * Locate CCSR region. Irritatingly, there is no way to find it + * unless you already know where it is. Try to infer its location + * from the device tree. + */ + + ccsr = -1; + for (name = soc_name_guesses; *name != NULL && ccsr == -1; name++) + ccsr = OF_finddevice(*name); + if (ccsr == -1) { + char type[64]; + + /* That didn't work. Search for devices of type "soc" */ + child = OF_child(OF_peer(0)); + for (OF_child(child); child != 0; child = OF_peer(child)) { + if (OF_getprop(child, "device_type", type, sizeof(type)) + <= 0) + continue; + + if (strcmp(type, "soc") == 0) { + ccsr = child; + break; + } + } + } + + if (ccsr == -1) + panic("Could not locate CCSR window!"); + + OF_getprop(ccsr, "#size-cells", &scells, sizeof(scells)); + OF_getprop(ccsr, "#address-cells", &acells, sizeof(acells)); + OF_searchprop(OF_parent(ccsr), "#address-cells", &pacells, + sizeof(pacells)); + OF_getprop(ccsr, "ranges", ranges, sizeof(ranges)); + ccsrbar = ccsrsize = 0; + for (i = acells; i < acells + pacells; i++) { + ccsrbar <<= 32; + ccsrbar |= ranges[i]; + } + for (i = acells + pacells; i < acells + pacells + scells; i++) { + ccsrsize <<= 32; + ccsrsize |= ranges[i]; + } + ccsrbar_va = pmap_early_io_map(ccsrbar, ccsrsize); + + /* * Clear local access windows. Skip DRAM entries, so we don't shoot * ourselves in the foot. */