From owner-freebsd-amd64@FreeBSD.ORG Fri Jun 24 14:04:40 2005 Return-Path: X-Original-To: freebsd-amd64@freebsd.org Delivered-To: freebsd-amd64@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 18D5616A41C for ; Fri, 24 Jun 2005 14:04:40 +0000 (GMT) (envelope-from cracauer@schlepper.zs64.net) Received: from schlepper.zs64.net (schlepper.zs64.net [212.12.50.230]) by mx1.FreeBSD.org (Postfix) with ESMTP id A6F1343D48 for ; Fri, 24 Jun 2005 14:04:37 +0000 (GMT) (envelope-from cracauer@schlepper.zs64.net) Received: from schlepper.zs64.net (schlepper [212.12.50.230]) by schlepper.zs64.net (8.13.1/8.12.9) with ESMTP id j5OE4Z3A088821; Fri, 24 Jun 2005 16:04:35 +0200 (CEST) (envelope-from cracauer@schlepper.zs64.net) Received: (from cracauer@localhost) by schlepper.zs64.net (8.13.1/8.12.9/Submit) id j5OE4ZIu088820; Fri, 24 Jun 2005 10:04:35 -0400 (EDT) (envelope-from cracauer) Date: Fri, 24 Jun 2005 10:04:35 -0400 From: Martin Cracauer To: freebsd-amd64@freebsd.org Message-ID: <20050624100435.A88745@cons.org> References: <200506131616.j5DGGDfr067534@lurza.secnetix.de> <200506132038.25975.josemi@redesjm.local> <200506131147.50300.peter@wemm.org> <200506132102.56346.josemi@redesjm.local> <20050623181856.A67269@cons.org> <20050624133457.GC65546@dragon.NUXI.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5i In-Reply-To: <20050624133457.GC65546@dragon.NUXI.org>; from obrien@freebsd.org on Fri, Jun 24, 2005 at 06:34:57AM -0700 Cc: Martin Cracauer Subject: Re: Athlon64 board with ECC support? X-BeenThere: freebsd-amd64@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the AMD64 platform List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 24 Jun 2005 14:04:40 -0000 David O'Brien wrote on Fri, Jun 24, 2005 at 06:34:57AM -0700: > On Thu, Jun 23, 2005 at 06:18:56PM -0400, Martin Cracauer wrote: > > And I suppose the BIOS needs to support it, too, > > Correct. > > > although it is not > > clear to me how ECC exceptions are supposed to be routed anyway. > > Clearly some chip not being CPU or RAM needs to have a say in the > > exception delivery? Anybody understands how this works? > > Why?? The memory controller is on the same die as the CPU. The > exception is handled w/in the CPU and it never goes out to any support > chip. Hm, so what does the BIOS do if it has the ECC options, exactly? Does it set defaults in the CPU itself? If so it should be possible to inspect and mess with these settings after startup? Martin -- %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% Martin Cracauer http://www.cons.org/cracauer/ No warranty. This email is probably produced by one of my cats stepping on the keys. No, I don't have an infinite number of cats.