From owner-svn-src-projects@FreeBSD.ORG Sun Feb 12 07:06:46 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 4B0BA106564A; Sun, 12 Feb 2012 07:06:46 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 3A2B88FC0C; Sun, 12 Feb 2012 07:06:46 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q1C76kTW069972; Sun, 12 Feb 2012 07:06:46 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q1C76kI2069970; Sun, 12 Feb 2012 07:06:46 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202120706.q1C76kI2069970@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Sun, 12 Feb 2012 07:06:46 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231548 - projects/armv6/sys/boot/fdt/dts X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 12 Feb 2012 07:06:46 -0000 Author: gonzo Date: Sun Feb 12 07:06:45 2012 New Revision: 231548 URL: http://svn.freebsd.org/changeset/base/231548 Log: Fix interrupt number for UART Modified: projects/armv6/sys/boot/fdt/dts/pandaboard.dts Modified: projects/armv6/sys/boot/fdt/dts/pandaboard.dts ============================================================================== --- projects/armv6/sys/boot/fdt/dts/pandaboard.dts Sun Feb 12 06:41:29 2012 (r231547) +++ projects/armv6/sys/boot/fdt/dts/pandaboard.dts Sun Feb 12 07:06:45 2012 (r231548) @@ -77,7 +77,7 @@ compatible = "ns16550"; reg = <0x48020000 0x1000>; reg-shift = <2>; - interrupts = < 68 >; + interrupts = < 106 >; interrupt-parent = <&GIC>; clock-frequency = < 48000000 >; /* 48Mhz clock for all uarts */ /* (techref 17.3.1.1) */