Date: Mon, 23 Feb 2015 20:09:05 +0000 (UTC) From: Ian Lepore <ian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r279215 - head/sys/arm/arm Message-ID: <201502232009.t1NK95BP012464@svn.freebsd.org>
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Author: ian Date: Mon Feb 23 20:09:05 2015 New Revision: 279215 URL: https://svnweb.freebsd.org/changeset/base/279215 Log: There is no reason to do i+dcache writeback and invalidate when changing the translation table (this may be left over from armv5 days). It's especially bad to do so using a cache operation that isn't coherent on SMP systems. Submitted by: Michal Meloun Modified: head/sys/arm/arm/cpufunc_asm_armv7.S Modified: head/sys/arm/arm/cpufunc_asm_armv7.S ============================================================================== --- head/sys/arm/arm/cpufunc_asm_armv7.S Mon Feb 23 19:36:31 2015 (r279214) +++ head/sys/arm/arm/cpufunc_asm_armv7.S Mon Feb 23 20:09:05 2015 (r279215) @@ -72,11 +72,7 @@ __FBSDID("$FreeBSD$"); #endif ENTRY(armv7_setttb) - stmdb sp!, {r0, lr} - bl _C_LABEL(armv7_idcache_wbinv_all) /* clean the D cache */ - ldmia sp!, {r0, lr} dsb - orr r0, r0, #PT_ATTR mcr CP15_TTBR0(r0) isb
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