From owner-svn-src-head@freebsd.org Mon Jul 3 20:47:34 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 0CF349EFD4D; Mon, 3 Jul 2017 20:47:34 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id C36FB8184E; Mon, 3 Jul 2017 20:47:33 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v63KlWTZ098982; Mon, 3 Jul 2017 20:47:32 GMT (envelope-from marius@FreeBSD.org) Received: (from marius@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v63KlWSF098981; Mon, 3 Jul 2017 20:47:32 GMT (envelope-from marius@FreeBSD.org) Message-Id: <201707032047.v63KlWSF098981@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: marius set sender to marius@FreeBSD.org using -f From: Marius Strobl Date: Mon, 3 Jul 2017 20:47:32 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r320620 - head/sys/dev/sdhci X-SVN-Group: head X-SVN-Commit-Author: marius X-SVN-Commit-Paths: head/sys/dev/sdhci X-SVN-Commit-Revision: 320620 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Jul 2017 20:47:34 -0000 Author: marius Date: Mon Jul 3 20:47:32 2017 New Revision: 320620 URL: https://svnweb.freebsd.org/changeset/base/320620 Log: Correct a typo in the comment part of r320577, later on copied into the commit message; as actually implemented, the intent is to retry up to 2 ms for controllers to enable bus power. Noticed by: ian@, rgrimes@ Additional note: Among others, the problem addressed by r320577 is the APL32 ("Storage Controllers May Not Be Power Gated") erratum. Hopefully, along with r318282, r320577 works around the remaining problems seen with Intel Apollo Lake eMMC and SDXC controllers. Modified: head/sys/dev/sdhci/sdhci.c Modified: head/sys/dev/sdhci/sdhci.c ============================================================================== --- head/sys/dev/sdhci/sdhci.c Mon Jul 3 20:44:01 2017 (r320619) +++ head/sys/dev/sdhci/sdhci.c Mon Jul 3 20:47:32 2017 (r320620) @@ -398,7 +398,7 @@ sdhci_set_power(struct sdhci_slot *slot, u_char power) /* * Turn on VDD1 power. Note that at least some Intel controllers can * fail to enable bus power on the first try after transiting from D3 - * to D0, so we give them up to 20 ms. + * to D0, so we give them up to 2 ms. */ pwr |= SDHCI_POWER_ON; for (i = 0; i < 20; i++) {