From owner-svn-src-user@FreeBSD.ORG Sat Mar 7 01:18:22 2009 Return-Path: Delivered-To: svn-src-user@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 36DFC1065672; Sat, 7 Mar 2009 01:18:22 +0000 (UTC) (envelope-from kmacy@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 222C08FC1A; Sat, 7 Mar 2009 01:18:22 +0000 (UTC) (envelope-from kmacy@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n271IMpV034128; Sat, 7 Mar 2009 01:18:22 GMT (envelope-from kmacy@svn.freebsd.org) Received: (from kmacy@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n271IL5p034118; Sat, 7 Mar 2009 01:18:21 GMT (envelope-from kmacy@svn.freebsd.org) Message-Id: <200903070118.n271IL5p034118@svn.freebsd.org> From: Kip Macy Date: Sat, 7 Mar 2009 01:18:21 +0000 (UTC) To: src-committers@freebsd.org, svn-src-user@freebsd.org X-SVN-Group: user MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r189470 - in user/kmacy/releng_7_net_backport/sys: amd64/include arm/include dev/bce dev/mxge i386/include ia64/include powerpc/include sparc64/include sun4v/include X-BeenThere: svn-src-user@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the experimental " user" src tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 07 Mar 2009 01:18:22 -0000 Author: kmacy Date: Sat Mar 7 01:18:21 2009 New Revision: 189470 URL: http://svn.freebsd.org/changeset/base/189470 Log: multiq step 1: - atomic_barriers: add atomic barriers to atomic.h on all architectures Modified: user/kmacy/releng_7_net_backport/sys/amd64/include/atomic.h user/kmacy/releng_7_net_backport/sys/arm/include/atomic.h user/kmacy/releng_7_net_backport/sys/dev/bce/if_bcereg.h user/kmacy/releng_7_net_backport/sys/dev/mxge/if_mxge.c user/kmacy/releng_7_net_backport/sys/dev/mxge/if_mxge_var.h user/kmacy/releng_7_net_backport/sys/i386/include/atomic.h user/kmacy/releng_7_net_backport/sys/ia64/include/atomic.h user/kmacy/releng_7_net_backport/sys/powerpc/include/atomic.h user/kmacy/releng_7_net_backport/sys/sparc64/include/atomic.h user/kmacy/releng_7_net_backport/sys/sun4v/include/atomic.h Modified: user/kmacy/releng_7_net_backport/sys/amd64/include/atomic.h ============================================================================== --- user/kmacy/releng_7_net_backport/sys/amd64/include/atomic.h Sat Mar 7 01:17:13 2009 (r189469) +++ user/kmacy/releng_7_net_backport/sys/amd64/include/atomic.h Sat Mar 7 01:18:21 2009 (r189470) @@ -32,6 +32,10 @@ #error this file needs sys/cdefs.h as a prerequisite #endif +#define mb() __asm__ __volatile__ ("mfence;": : :"memory") +#define wmb() __asm__ __volatile__ ("sfence;": : :"memory") +#define rmb() __asm__ __volatile__ ("lfence;": : :"memory") + /* * Various simple operations on memory, each of which is atomic in the * presence of interrupts and multiple processors. Modified: user/kmacy/releng_7_net_backport/sys/arm/include/atomic.h ============================================================================== --- user/kmacy/releng_7_net_backport/sys/arm/include/atomic.h Sat Mar 7 01:17:13 2009 (r189469) +++ user/kmacy/releng_7_net_backport/sys/arm/include/atomic.h Sat Mar 7 01:18:21 2009 (r189470) @@ -45,6 +45,10 @@ #include +#define mb() +#define wmb() +#define rmb() + #ifndef I32_bit #define I32_bit (1 << 7) /* IRQ disable */ #endif Modified: user/kmacy/releng_7_net_backport/sys/dev/bce/if_bcereg.h ============================================================================== --- user/kmacy/releng_7_net_backport/sys/dev/bce/if_bcereg.h Sat Mar 7 01:17:13 2009 (r189469) +++ user/kmacy/releng_7_net_backport/sys/dev/bce/if_bcereg.h Sat Mar 7 01:18:21 2009 (r189470) @@ -557,6 +557,8 @@ #endif /* BCE_DEBUG */ + +#if __FreeBSD_version < 701101 #if defined(__i386__) || defined(__amd64__) #define mb() __asm volatile("mfence" ::: "memory") #define wmb() __asm volatile("sfence" ::: "memory") @@ -566,6 +568,7 @@ #define rmb() #define wmb() #endif +#endif /****************************************************************************/ /* Device identification definitions. */ Modified: user/kmacy/releng_7_net_backport/sys/dev/mxge/if_mxge.c ============================================================================== --- user/kmacy/releng_7_net_backport/sys/dev/mxge/if_mxge.c Sat Mar 7 01:17:13 2009 (r189469) +++ user/kmacy/releng_7_net_backport/sys/dev/mxge/if_mxge.c Sat Mar 7 01:18:21 2009 (r189470) @@ -747,9 +747,9 @@ mxge_load_firmware_helper(mxge_softc_t * mxge_pio_copy(sc->sram + MXGE_FW_OFFSET + i, inflate_buffer + i, min(256U, (unsigned)(fw_len - i))); - mb(); + wmb(); dummy = *sc->sram; - mb(); + wmb(); } *limit = fw_len; @@ -782,7 +782,7 @@ mxge_dummy_rdma(mxge_softc_t *sc, int en /* clear confirmation addr */ confirm = (volatile uint32_t *)sc->cmd; *confirm = 0; - mb(); + wmb(); /* send an rdma command to the PCIe engine, and wait for the response in the confirmation address. The firmware should @@ -804,9 +804,9 @@ mxge_dummy_rdma(mxge_softc_t *sc, int en submit = (volatile char *)(sc->sram + MXGEFW_BOOT_DUMMY_RDMA); mxge_pio_copy(submit, buf, 64); - mb(); + wmb(); DELAY(1000); - mb(); + wmb(); i = 0; while (*confirm != 0xffffffff && i < 20) { DELAY(1000); @@ -844,7 +844,7 @@ mxge_send_cmd(mxge_softc_t *sc, uint32_t buf->response_addr.high = htobe32(dma_high); mtx_lock(&sc->cmd_mtx); response->result = 0xffffffff; - mb(); + wmb(); mxge_pio_copy((volatile void *)cmd_addr, buf, sizeof (*buf)); /* wait up to 20ms */ @@ -852,7 +852,7 @@ mxge_send_cmd(mxge_softc_t *sc, uint32_t for (sleep_total = 0; sleep_total < 20; sleep_total++) { bus_dmamap_sync(sc->cmd_dma.dmat, sc->cmd_dma.map, BUS_DMASYNC_POSTREAD); - mb(); + wmb(); switch (be32toh(response->result)) { case 0: data->data0 = be32toh(response->data); @@ -980,7 +980,7 @@ mxge_load_firmware(mxge_softc_t *sc, int /* clear confirmation addr */ confirm = (volatile uint32_t *)sc->cmd; *confirm = 0; - mb(); + wmb(); /* send a reload command to the bootstrap MCP, and wait for the response in the confirmation address. The firmware should write a -1 there to indicate it is alive and well @@ -1005,9 +1005,9 @@ mxge_load_firmware(mxge_softc_t *sc, int submit = (volatile char *)(sc->sram + MXGEFW_BOOT_HANDOFF); mxge_pio_copy(submit, buf, 64); - mb(); + wmb(); DELAY(1000); - mb(); + wmb(); i = 0; while (*confirm != 0xffffffff && i < 20) { DELAY(1000*10); @@ -1668,7 +1668,7 @@ mxge_submit_req_backwards(mxge_tx_ring_t idx = (starting_slot + cnt) & tx->mask; mxge_pio_copy(&tx->lanai[idx], &src[cnt], sizeof(*src)); - mb(); + wmb(); } } @@ -1694,14 +1694,14 @@ mxge_submit_req(mxge_tx_ring_t *tx, mcp_ last_flags = src->flags; src->flags = 0; - mb(); + wmb(); dst = dstp = &tx->lanai[idx]; srcp = src; if ((idx + cnt) < tx->mask) { for (i = 0; i < (cnt - 1); i += 2) { mxge_pio_copy(dstp, srcp, 2 * sizeof(*src)); - mb(); /* force write every 32 bytes */ + wmb(); /* force write every 32 bytes */ srcp += 2; dstp += 2; } @@ -1714,7 +1714,7 @@ mxge_submit_req(mxge_tx_ring_t *tx, mcp_ if (i < cnt) { /* submit the first request */ mxge_pio_copy(dstp, srcp, sizeof(*src)); - mb(); /* barrier before setting valid flag */ + wmb(); /* barrier before setting valid flag */ } /* re-write the last 32-bits with the valid flags */ @@ -1725,7 +1725,7 @@ mxge_submit_req(mxge_tx_ring_t *tx, mcp_ dst_ints+=3; *dst_ints = *src_ints; tx->req += cnt; - mb(); + wmb(); } #if IFCAP_TSO4 @@ -2144,12 +2144,12 @@ mxge_submit_8rx(volatile mcp_kreq_ether_ low = src->addr_low; src->addr_low = 0xffffffff; mxge_pio_copy(dst, src, 4 * sizeof (*src)); - mb(); + wmb(); mxge_pio_copy(dst + 4, src + 4, 4 * sizeof (*src)); - mb(); + wmb(); src->addr_low = low; dst->addr_low = low; - mb(); + wmb(); } static int @@ -2736,7 +2736,7 @@ mxge_intr(void *arg) send_done_count = be32toh(stats->send_done_count); } if (sc->legacy_irq && mxge_deassert_wait) - mb(); + wmb(); } while (*((volatile uint8_t *) &stats->valid)); if (__predict_false(stats->stats_updated)) { @@ -3385,7 +3385,7 @@ mxge_close(mxge_softc_t *sc) callout_stop(&sc->co_hdl); sc->ifp->if_drv_flags &= ~IFF_DRV_RUNNING; old_down_cnt = sc->down_cnt; - mb(); + wmb(); err = mxge_send_cmd(sc, MXGEFW_CMD_ETHERNET_DOWN, &cmd); if (err) { device_printf(sc->dev, "Couldn't bring down link\n"); @@ -3394,7 +3394,7 @@ mxge_close(mxge_softc_t *sc) /* wait for down irq */ DELAY(10 * sc->intr_coal_delay); } - mb(); + wmb(); if (old_down_cnt == sc->down_cnt) { device_printf(sc->dev, "never got down irq\n"); } Modified: user/kmacy/releng_7_net_backport/sys/dev/mxge/if_mxge_var.h ============================================================================== --- user/kmacy/releng_7_net_backport/sys/dev/mxge/if_mxge_var.h Sat Mar 7 01:17:13 2009 (r189469) +++ user/kmacy/releng_7_net_backport/sys/dev/mxge/if_mxge_var.h Sat Mar 7 01:18:21 2009 (r189470) @@ -282,6 +282,8 @@ struct mxge_media_type /* implement our own memory barriers, since bus_space_barrier cannot handle write-combining regions */ +#if __FreeBSD_version < 701101 + #if defined (__GNUC__) #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__ #define mb() __asm__ __volatile__ ("sfence;": : :"memory") @@ -296,6 +298,8 @@ struct mxge_media_type #error "unknown compiler" #endif +#endif + static inline void mxge_pio_copy(volatile void *to_v, void *from_v, size_t size) { Modified: user/kmacy/releng_7_net_backport/sys/i386/include/atomic.h ============================================================================== --- user/kmacy/releng_7_net_backport/sys/i386/include/atomic.h Sat Mar 7 01:17:13 2009 (r189469) +++ user/kmacy/releng_7_net_backport/sys/i386/include/atomic.h Sat Mar 7 01:18:21 2009 (r189470) @@ -32,6 +32,47 @@ #error this file needs sys/cdefs.h as a prerequisite #endif +#if defined(_KERNEL) +#include +#include +#define mb() __asm __volatile( \ + "testl %0,cpu_feature \n\ + je 2f \n\ + mfence \n\ +1: \n\ + .section .text.offpath \n\ +2: lock \n\ + addl $0,cpu_feature \n\ + jmp 1b \n\ + .text \n\ +" \ + : : "i"(CPUID_SSE2) : "memory") +#define wmb() __asm __volatile( \ + "testl %0,cpu_feature \n\ + je 2f \n\ + sfence \n\ +1: \n\ + .section .text.offpath \n\ +2: lock \n\ + addl $0,cpu_feature \n\ + jmp 1b \n\ + .text \n\ +" \ + : : "i"(CPUID_XMM) : "memory") +#define rmb() __asm __volatile( \ + "testl %0,cpu_feature \n\ + je 2f \n\ + lfence \n\ +1: \n\ + .section .text.offpath \n\ +2: lock \n\ + addl $0,cpu_feature \n\ + jmp 1b \n\ + .text \n\ +" \ + : : "i"(CPUID_SSE2) : "memory") +#endif + /* * Various simple operations on memory, each of which is atomic in the * presence of interrupts and multiple processors. Modified: user/kmacy/releng_7_net_backport/sys/ia64/include/atomic.h ============================================================================== --- user/kmacy/releng_7_net_backport/sys/ia64/include/atomic.h Sat Mar 7 01:17:13 2009 (r189469) +++ user/kmacy/releng_7_net_backport/sys/ia64/include/atomic.h Sat Mar 7 01:18:21 2009 (r189470) @@ -29,6 +29,10 @@ #ifndef _MACHINE_ATOMIC_H_ #define _MACHINE_ATOMIC_H_ +#define mb() +#define wmb() +#define rmb() + /* * Various simple arithmetic on memory which is atomic in the presence * of interrupts and SMP safe. Modified: user/kmacy/releng_7_net_backport/sys/powerpc/include/atomic.h ============================================================================== --- user/kmacy/releng_7_net_backport/sys/powerpc/include/atomic.h Sat Mar 7 01:17:13 2009 (r189469) +++ user/kmacy/releng_7_net_backport/sys/powerpc/include/atomic.h Sat Mar 7 01:18:21 2009 (r189470) @@ -39,6 +39,10 @@ #define __ATOMIC_BARRIER \ __asm __volatile("sync" : : : "memory") +#define mb() __ATOMIC_BARRIER +#define wmb() mb() +#define rmb() mb() + /* * atomic_add(p, v) * { *p += v; } Modified: user/kmacy/releng_7_net_backport/sys/sparc64/include/atomic.h ============================================================================== --- user/kmacy/releng_7_net_backport/sys/sparc64/include/atomic.h Sat Mar 7 01:17:13 2009 (r189469) +++ user/kmacy/releng_7_net_backport/sys/sparc64/include/atomic.h Sat Mar 7 01:18:21 2009 (r189470) @@ -40,6 +40,10 @@ #define __ASI_ATOMIC ASI_P #endif +#define mb() __asm__ __volatile__ ("membar #MemIssue": : :"memory") +#define wmb() mb() +#define rmb() mb() + /* * Various simple arithmetic on memory which is atomic in the presence * of interrupts and multiple processors. See atomic(9) for details. Modified: user/kmacy/releng_7_net_backport/sys/sun4v/include/atomic.h ============================================================================== --- user/kmacy/releng_7_net_backport/sys/sun4v/include/atomic.h Sat Mar 7 01:17:13 2009 (r189469) +++ user/kmacy/releng_7_net_backport/sys/sun4v/include/atomic.h Sat Mar 7 01:18:21 2009 (r189470) @@ -33,6 +33,10 @@ #include +#define mb() __asm__ __volatile__ ("membar #MemIssue": : :"memory") +#define wmb() mb() +#define rmb() mb() + /* Userland needs different ASI's. */ #ifdef _KERNEL #define __ASI_ATOMIC ASI_N